From patchwork Mon Jun 27 15:55:45 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sanjeev Premi X-Patchwork-Id: 102212 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 6C24DB6F54 for ; Tue, 28 Jun 2011 01:56:25 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 18412280CF; Mon, 27 Jun 2011 17:56:21 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Cn58DPtEAFna; Mon, 27 Jun 2011 17:56:20 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8ABEE280C8; Mon, 27 Jun 2011 17:56:18 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D6B75280C8 for ; Mon, 27 Jun 2011 17:56:15 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id F-CW8l+4jU4F for ; Mon, 27 Jun 2011 17:56:13 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by theia.denx.de (Postfix) with ESMTPS id C286E2808B for ; Mon, 27 Jun 2011 17:56:10 +0200 (CEST) Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id p5RFu5DL028962 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Mon, 27 Jun 2011 10:56:08 -0500 Received: from dbde70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p5RFu4mG001969 for ; Mon, 27 Jun 2011 21:26:05 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 8.3.106.1; Mon, 27 Jun 2011 21:26:04 +0530 Received: from psplinux050.india.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p5RFu0jX001968; Mon, 27 Jun 2011 21:26:01 +0530 (IST) From: Sanjeev Premi To: Date: Mon, 27 Jun 2011 21:25:45 +0530 Message-ID: <1309190145-24994-1-git-send-email-premi@ti.com> X-Mailer: git-send-email 1.7.2.2 MIME-Version: 1.0 Cc: Sriramakrishnan Subject: [U-Boot] [PATCHv2] omap3evm: Update ethernet reset sequence for Rev.G board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Sriramakrishnan The GPIO pin used for resetting the external LAN chip has changed for Rev.G board. The patch uses generic gpio API instead of direct access to corresponding registers. Signed-off-by: Sriramakrishnan Signed-off-by: Sanjeev Premi --- Changes since v1: * Use of gpio API instead of direct register access. Tested basic ethernet operations - dhcp and tftpboot - on the OMAP3EVM Rev G to load kernel and ramdisk images. board/ti/evm/evm.c | 35 ++++++++++++++++++++++++++--------- 1 files changed, 26 insertions(+), 9 deletions(-) diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c index 8f9f141..2c95fae 100644 --- a/board/ti/evm/evm.c +++ b/board/ti/evm/evm.c @@ -33,10 +33,14 @@ #include #include #include +#include #include #include #include "evm.h" +#define OMAP3EVM_GPIO_ETH_RST_GEN1 64 +#define OMAP3EVM_GPIO_ETH_RST_GEN2 7 + DECLARE_GLOBAL_DATA_PTR; static u32 omap3_evm_version; @@ -181,17 +185,30 @@ static void setup_net_chip(void) */ static void reset_net_chip(void) { - struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE; - - /* Make GPIO 64 as output pin */ - writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe); - - /* Now send a pulse on the GPIO pin */ - writel(GPIO0, &gpio3_base->setdataout); + int ret; + int rst_gpio; + + if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) { + rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1; + } else { + rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2; + } + + ret = omap_request_gpio(rst_gpio); + if (ret < 0) { + printf("Unable to get GPIO %d\n", rst_gpio); + return ; + } + + /* Configure as output */ + omap_set_gpio_direction(rst_gpio, 0); + + /* Send a pulse on the GPIO pin */ + omap_set_gpio_dataout(rst_gpio, 1); udelay(1); - writel(GPIO0, &gpio3_base->cleardataout); + omap_set_gpio_dataout(rst_gpio, 0); udelay(1); - writel(GPIO0, &gpio3_base->setdataout); + omap_set_gpio_dataout(rst_gpio, 1); } int board_eth_init(bd_t *bis)