Message ID | 1305633080-30772-1-git-send-email-sbabic@denx.de |
---|---|
State | Accepted |
Commit | d43458d23783eabcc770d1012f5656c6241ec0f8 |
Headers | show |
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index fccd2cd..4ebf38d 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -133,7 +133,7 @@ u32 get_cpu_rev(void) return srev | 0x8000; } -char *get_reset_cause(void) +static char *get_reset_cause(void) { /* read RCSR register from CCM module */ struct clock_control_regs *ccm = @@ -144,16 +144,12 @@ char *get_reset_cause(void) switch (cause) { case 0x0000: return "POR"; - break; case 0x0001: return "RST"; - break; case 0x0002: return "WDOG"; - break; case 0x0006: return "JTAG"; - break; default: return "unknown reset"; }