From patchwork Wed Apr 6 11:53:48 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Eibach X-Patchwork-Id: 90012 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B5056B6EF1 for ; Wed, 6 Apr 2011 22:14:16 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A6661280AC; Wed, 6 Apr 2011 14:13:53 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9xZK2P1Ltapl; Wed, 6 Apr 2011 14:13:53 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A851A280AD; Wed, 6 Apr 2011 14:13:31 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CC008280A6 for ; Wed, 6 Apr 2011 14:13:28 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Ijkrk12oodcK for ; Wed, 6 Apr 2011 14:13:26 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from sputnik.urmx.de (sputnik.urmx.de [88.198.51.18]) by theia.denx.de (Postfix) with ESMTP id 0C22A2808A for ; Wed, 6 Apr 2011 14:13:22 +0200 (CEST) Received: from mailrelay.gdsys.de (unknown [217.6.197.20]) by sputnik.urmx.de (Postfix) with ESMTP id 866EA6020214 for ; Wed, 6 Apr 2011 13:54:17 +0200 (CEST) Received: from mailsgw.gdsys.de (localhost [127.0.0.1]) by mailsgw.gdsys.de (Postfix) with ESMTP id 9C2D71F8801 for ; Wed, 6 Apr 2011 13:54:18 +0200 (CEST) From: Dirk Eibach To: u-boot@lists.denx.de Date: Wed, 6 Apr 2011 13:53:48 +0200 Message-Id: <1302090830-15824-7-git-send-email-eibach@gdsys.de> In-Reply-To: <1302090830-15824-6-git-send-email-eibach@gdsys.de> References: <1302090830-15824-1-git-send-email-eibach@gdsys.de> <1302090830-15824-2-git-send-email-eibach@gdsys.de> <1302090830-15824-3-git-send-email-eibach@gdsys.de> <1302090830-15824-4-git-send-email-eibach@gdsys.de> <1302090830-15824-5-git-send-email-eibach@gdsys.de> <1302090830-15824-6-git-send-email-eibach@gdsys.de> X-SafeGuard_MailGateway: Version: 5.60.3.10058 SGMG Date: 20110406115418Z X-AntiVirus: checked by AntiVir MailGate (version: 2.0.2-5; AVE: 7.9.4.202; VDF: 7.11.5.205; host: mailrelay) Subject: [U-Boot] [PATCH 6/8] ppc4xx: Enable MPC92469AC on DLVision 10G X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Dirk Eibach --- include/configs/dlvision-10g.h | 1 + include/gdsys_fpga.h | 8 +++++--- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 548b7eb..368aceb 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -312,6 +312,7 @@ * OSD Setup */ #define CONFIG_SYS_ICS8N3QV01 +#define CONFIG_SYS_MPC92469AC #define CONFIG_SYS_SIL1178 #define CONFIG_SYS_OSD_SCREENS CONFIG_SYS_FPGA_COUNT diff --git a/include/gdsys_fpga.h b/include/gdsys_fpga.h index b02e28c..c0b1b5c 100644 --- a/include/gdsys_fpga.h +++ b/include/gdsys_fpga.h @@ -97,11 +97,13 @@ typedef struct ihs_fpga { u16 extended_interrupt; /* 0x001c */ u16 reserved_1[9]; /* 0x001e */ ihs_i2c_t i2c; /* 0x0030 */ - u16 reserved_2[51]; /* 0x0038 */ + u16 reserved_2[16]; /* 0x0038 */ + u16 mpc3w_control; /* 0x0058 */ + u16 reserved_3[34]; /* 0x005a */ u16 videocontrol; /* 0x009e */ - u16 reserved_3[176]; /* 0x00a0 */ + u16 reserved_4[176]; /* 0x00a0 */ ihs_osd_t osd; /* 0x0200 */ - u16 reserved_4[761]; /* 0x020e */ + u16 reserved_5[761]; /* 0x020e */ u16 videomem; /* 0x0800 */ } ihs_fpga_t; #endif