From patchwork Wed Apr 6 11:53:43 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Eibach X-Patchwork-Id: 90013 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 78F14B6EF1 for ; Wed, 6 Apr 2011 22:14:31 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CDCFD280D8; Wed, 6 Apr 2011 14:13:59 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dLEdFCkDP6Uw; Wed, 6 Apr 2011 14:13:59 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C946D280B2; Wed, 6 Apr 2011 14:13:32 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 21609280AC for ; Wed, 6 Apr 2011 14:13:30 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id K3xwuyymMk9n for ; Wed, 6 Apr 2011 14:13:29 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from sputnik.urmx.de (sputnik.urmx.de [88.198.51.18]) by theia.denx.de (Postfix) with ESMTP id 3B67E28094 for ; Wed, 6 Apr 2011 14:13:24 +0200 (CEST) Received: from mailrelay.gdsys.de (unknown [217.6.197.20]) by sputnik.urmx.de (Postfix) with ESMTP id D608F602020A for ; Wed, 6 Apr 2011 13:53:56 +0200 (CEST) Received: from mailsgw.gdsys.de (localhost [127.0.0.1]) by mailsgw.gdsys.de (Postfix) with ESMTP id E64DE1F8801 for ; Wed, 6 Apr 2011 13:53:57 +0200 (CEST) From: Dirk Eibach To: u-boot@lists.denx.de Date: Wed, 6 Apr 2011 13:53:43 +0200 Message-Id: <1302090830-15824-2-git-send-email-eibach@gdsys.de> In-Reply-To: <1302090830-15824-1-git-send-email-eibach@gdsys.de> References: <1302090830-15824-1-git-send-email-eibach@gdsys.de> X-SafeGuard_MailGateway: Version: 5.60.3.10058 SGMG Date: 20110406115357Z X-AntiVirus: checked by AntiVir MailGate (version: 2.0.2-5; AVE: 7.9.4.202; VDF: 7.11.5.205; host: mailrelay) Subject: [U-Boot] [PATCH 1/8] ppc4xx: Improve DLVision-10G PLL setup X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Dirk Eibach --- board/gdsys/common/osd.c | 55 +++++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 52 insertions(+), 3 deletions(-) diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c index 4d8c046..6e4edae 100644 --- a/board/gdsys/common/osd.c +++ b/board/gdsys/common/osd.c @@ -30,7 +30,12 @@ #define CH7301_I2C_ADDR 0x75 #define ICS8N3QV01_I2C_ADDR 0x6E -#define ICS8N3QV01_FREF 114285 +#define ICS8N3QV01_FREF 114285000 +#define ICS8N3QV01_FREF_LL 114285000LL +#define ICS8N3QV01_F_DEFAULT_0 156250000LL +#define ICS8N3QV01_F_DEFAULT_1 125000000LL +#define ICS8N3QV01_F_DEFAULT_2 100000000LL +#define ICS8N3QV01_F_DEFAULT_3 25175000LL #define SIL1178_MASTER_I2C_ADDRESS 0x38 #define SIL1178_SLAVE_I2C_ADDRESS 0x39 @@ -150,6 +155,41 @@ static void mpc92469ac_set(unsigned screen, unsigned int fout) #endif #ifdef CONFIG_SYS_ICS8N3QV01 + +static unsigned int ics8n3qv01_get_fout_calc(unsigned screen, unsigned index) +{ + unsigned long long n; + unsigned long long mint; + unsigned long long mfrac; + u8 reg_a, reg_b, reg_c, reg_d, reg_f; + unsigned long long fout_calc; + + if (index > 3) + return 0; + + reg_a = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 0 + index); + reg_b = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 4 + index); + reg_c = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 8 + index); + reg_d = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 12 + index); + reg_f = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 20 + index); + + mint = ((reg_a >> 1) & 0x1f) | (reg_f & 0x20); + mfrac = ((reg_a & 0x01) << 17) | (reg_b << 9) | (reg_c << 1) + | (reg_d >> 7); + n = reg_d & 0x7f; + + fout_calc = (mint * ICS8N3QV01_FREF_LL + + mfrac * ICS8N3QV01_FREF_LL / 262144LL + + ICS8N3QV01_FREF_LL / 524288LL + + n / 2) + / n + * 1000000 + / (1000000 - 100); + + return fout_calc; +} + + static void ics8n3qv01_calc_parameters(unsigned int fout, unsigned int *_mint, unsigned int *_mfrac, unsigned int *_n) @@ -160,7 +200,7 @@ static void ics8n3qv01_calc_parameters(unsigned int fout, unsigned int mint; unsigned long long mfrac; - n = 2550000000U / fout; + n = (2215000000U + fout / 2) / fout; if ((n & 1) && (n > 5)) n -= 1; @@ -184,9 +224,18 @@ static void ics8n3qv01_set(unsigned screen, unsigned int fout) unsigned int n; unsigned int mint; unsigned int mfrac; + unsigned int fout_calc; + unsigned long long fout_prog; + long long off_ppm; u8 reg0, reg4, reg8, reg12, reg18, reg20; - ics8n3qv01_calc_parameters(fout, &mint, &mfrac, &n); + fout_calc = ics8n3qv01_get_fout_calc(screen, 1); + off_ppm = (fout_calc - ICS8N3QV01_F_DEFAULT_1) * 1000000 + / ICS8N3QV01_F_DEFAULT_1; + printf(" PLL is off by %lld ppm\n", off_ppm); + fout_prog = (unsigned long long)fout * (unsigned long long)fout_calc + / ICS8N3QV01_F_DEFAULT_1; + ics8n3qv01_calc_parameters(fout_prog, &mint, &mfrac, &n); reg0 = fpga_iic_read(screen, ICS8N3QV01_I2C_ADDR, 0) & 0xc0; reg0 |= (mint & 0x1f) << 1;