From patchwork Fri Jan 14 13:35:23 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefano Babic X-Patchwork-Id: 78903 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B0196B7088 for ; Sat, 15 Jan 2011 00:36:56 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D31BA28087; Fri, 14 Jan 2011 14:36:45 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Di5CKi7V0HJR; Fri, 14 Jan 2011 14:36:45 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B950C28098; Fri, 14 Jan 2011 14:36:23 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E39D528080 for ; Fri, 14 Jan 2011 14:36:19 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Q41GowoVotEX for ; Fri, 14 Jan 2011 14:36:18 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtpi3.ngi.it (smtpi3.ngi.it [88.149.128.33]) by theia.denx.de (Postfix) with ESMTP id 4CD0528087 for ; Fri, 14 Jan 2011 14:36:16 +0100 (CET) Received: from paperina.lan (unknown [88.149.182.160]) by smtpi3.ngi.it (Postfix) with ESMTP id E3C1035C078; Fri, 14 Jan 2011 14:35:49 +0100 (CET) Received: from papero.lan (papero.lan [192.168.2.245]) by paperina.lan (Postfix) with ESMTP id 952F8140A4F5; Fri, 14 Jan 2011 14:35:49 +0100 (CET) From: Stefano Babic To: u-boot@lists.denx.de Date: Fri, 14 Jan 2011 14:35:23 +0100 Message-Id: <1295012124-15551-6-git-send-email-sbabic@denx.de> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1295012124-15551-1-git-send-email-sbabic@denx.de> References: <1295012124-15551-1-git-send-email-sbabic@denx.de> Subject: [U-Boot] [PATCH 6/7] mxc_spi: add support for i.MX35 processor X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Stefano Babic --- drivers/spi/mxc_spi.c | 96 +++++++++++++++++++++++++++++++++++++------------ 1 files changed, 73 insertions(+), 23 deletions(-) diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index d558137..b353c83 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -70,6 +70,8 @@ static unsigned long spi_bases[] = { 0x53f84000, }; +#define spi_cfg spi_cfg_mx3 + #elif defined(CONFIG_MX51) #include #include @@ -111,6 +113,47 @@ static unsigned long spi_bases[] = { CSPI2_BASE_ADDR, CSPI3_BASE_ADDR, }; +#define spi_cfg spi_cfg_mx51 + +#elif defined(CONFIG_MX35) + +#include +#include + +#define MXC_CSPIRXDATA 0x00 +#define MXC_CSPITXDATA 0x04 +#define MXC_CSPICTRL 0x08 +#define MXC_CSPIINT 0x0C +#define MXC_CSPIDMA 0x10 +#define MXC_CSPISTAT 0x14 +#define MXC_CSPIPERIOD 0x18 +#define MXC_CSPITEST 0x1C +#define MXC_CSPIRESET 0x00 + +#define MXC_CSPICTRL_EN (1 << 0) +#define MXC_CSPICTRL_MODE (1 << 1) +#define MXC_CSPICTRL_XCH (1 << 2) +#define MXC_CSPICTRL_SMC (1 << 3) +#define MXC_CSPICTRL_POL (1 << 4) +#define MXC_CSPICTRL_PHA (1 << 5) +#define MXC_CSPICTRL_SSCTL (1 << 6) +#define MXC_CSPICTRL_SSPOL (1 << 7) +#define MXC_CSPICTRL_CHIPSELECT(x) (((x) & 0x3) << 12) +#define MXC_CSPICTRL_BITCOUNT(x) (((x) & 0xfff) << 20) +#define MXC_CSPICTRL_DATARATE(x) (((x) & 0x7) << 16) +#define MXC_CSPICTRL_TC (1 << 7) +#define MXC_CSPICTRL_RXOVF (1 << 6) +#define MXC_CSPICTRL_MAXBITS 0xfff + +#define MXC_CSPIPERIOD_32KHZ (1 << 15) +#define MAX_SPI_BYTES 4 + +static unsigned long spi_bases[] = { + 0x43fa4000, + 0x50010000, +}; +#define spi_cfg spi_cfg_mx3 + #else #error "Unsupported architecture" #endif @@ -158,8 +201,35 @@ void spi_cs_deactivate(struct spi_slave *slave) !(mxcs->ss_pol)); } -#ifdef CONFIG_MX51 -static s32 spi_cfg(struct mxc_spi_slave *mxcs, unsigned int cs, +#if defined(CONFIG_MX31) || defined(CONFIG_MX35) +static s32 spi_cfg_mx3(struct mxc_spi_slave *mxcs, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + unsigned int ctrl_reg; + + ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) | + MXC_CSPICTRL_BITCOUNT(MXC_CSPICTRL_MAXBITS) | + MXC_CSPICTRL_DATARATE(7) | /* FIXME: calculate data rate */ + MXC_CSPICTRL_EN | +#ifdef CONFIG_MX35 + MXC_CSPICTRL_SSCTL | +#endif + MXC_CSPICTRL_MODE; + + if (mode & SPI_CPHA) + ctrl_reg |= MXC_CSPICTRL_PHA; + if (mode & SPI_CPOL) + ctrl_reg |= MXC_CSPICTRL_POL; + if (mode & SPI_CS_HIGH) + ctrl_reg |= MXC_CSPICTRL_SSPOL; + mxcs->ctrl_reg = ctrl_reg; + + return 0; +} +#endif + +#if defined(CONFIG_MX51) +static s32 spi_cfg_mx51(struct mxc_spi_slave *mxcs, unsigned int cs, unsigned int max_hz, unsigned int mode) { u32 clk_src = mxc_get_clock(MXC_CSPI_CLK); @@ -227,7 +297,7 @@ static s32 spi_cfg(struct mxc_spi_slave *mxcs, unsigned int cs, /* * Configuration register setup - * The MX51 has support different setup for each SS + * The MX51 supports different setup for each SS */ reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_SSPOL))) | (ss_pol << (cs + MXC_CSPICON_SSPOL)); @@ -363,7 +433,6 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen, } - int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags) { @@ -441,7 +510,6 @@ static int decode_cs(struct mxc_spi_slave *mxcs, unsigned int cs) struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { - unsigned int ctrl_reg; struct mxc_spi_slave *mxcs; int ret; @@ -467,30 +535,12 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, mxcs->base = spi_bases[bus]; mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0; -#ifdef CONFIG_MX51 - /* Can be used for i.MX31 too ? */ - ctrl_reg = 0; ret = spi_cfg(mxcs, cs, max_hz, mode); if (ret) { printf("mxc_spi: cannot setup SPI controller\n"); free(mxcs); return NULL; } -#else - ctrl_reg = MXC_CSPICTRL_CHIPSELECT(cs) | - MXC_CSPICTRL_BITCOUNT(31) | - MXC_CSPICTRL_DATARATE(7) | /* FIXME: calculate data rate */ - MXC_CSPICTRL_EN | - MXC_CSPICTRL_MODE; - - if (mode & SPI_CPHA) - ctrl_reg |= MXC_CSPICTRL_PHA; - if (mode & SPI_CPOL) - ctrl_reg |= MXC_CSPICTRL_POL; - if (mode & SPI_CS_HIGH) - ctrl_reg |= MXC_CSPICTRL_SSPOL; - mxcs->ctrl_reg = ctrl_reg; -#endif return &mxcs->slave; }