From patchwork Thu Nov 8 20:30:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Beno=C3=AEt_Th=C3=A9baudeau?= X-Patchwork-Id: 197889 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 28CAD2C0097 for ; Fri, 9 Nov 2012 07:24:16 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D655D4A97C; Thu, 8 Nov 2012 21:24:14 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id EuNa7DEkHvLI; Thu, 8 Nov 2012 21:24:14 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0C4444A9E8; Thu, 8 Nov 2012 21:24:13 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C612A4A9E8 for ; Thu, 8 Nov 2012 21:24:11 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UbG+opBYYS4l for ; Thu, 8 Nov 2012 21:24:11 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from zose-mta12.web4all.fr (zose-mta12.web4all.fr [178.33.204.89]) by theia.denx.de (Postfix) with ESMTP id 0207F4A9E7 for ; Thu, 8 Nov 2012 21:24:09 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by zose-mta12.web4all.fr (Postfix) with ESMTP id B0912908BC; Thu, 8 Nov 2012 21:27:28 +0100 (CET) X-Virus-Scanned: amavisd-new at zose1.web4all.fr Received: from zose-mta12.web4all.fr ([127.0.0.1]) by localhost (zose-mta12.web4all.fr [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3AIgczhS5Icu; Thu, 8 Nov 2012 21:27:28 +0100 (CET) Received: from zose-store12.web4all.fr (zose-store12.web4all.fr [178.33.204.49]) by zose-mta12.web4all.fr (Postfix) with ESMTP id 6F12E904F0; Thu, 8 Nov 2012 21:27:28 +0100 (CET) Date: Thu, 8 Nov 2012 21:30:33 +0100 (CET) From: =?utf-8?Q?Beno=C3=AEt_Th=C3=A9baudeau?= To: U-Boot-Users ML Message-ID: <1291403877.872166.1352406633180.JavaMail.root@advansee.com> In-Reply-To: <1221800138.872097.1352406463706.JavaMail.root@advansee.com> MIME-Version: 1.0 X-Originating-IP: [88.188.188.98] X-Mailer: Zimbra 7.2.0_GA_2669 (ZimbraWebClient - FF3.0 (Win)/7.2.0_GA_2669) Cc: Marek Vasut Subject: [U-Boot] [PATCH v2 10/13] ehci-mxc: Define host offsets X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau Cc: Marek Vasut Cc: Stefano Babic --- Changes for v2: None. .../arch/arm/include/asm/arch-mx25/imx-regs.h | 1 + .../arch/arm/include/asm/arch-mx31/imx-regs.h | 1 + .../drivers/usb/host/ehci-mxc.c | 2 +- 3 files changed, 3 insertions(+), 1 deletion(-) diff --git u-boot-usb-76454b2.orig/arch/arm/include/asm/arch-mx25/imx-regs.h u-boot-usb-76454b2/arch/arm/include/asm/arch-mx25/imx-regs.h index e780296..c1bc4bc 100644 --- u-boot-usb-76454b2.orig/arch/arm/include/asm/arch-mx25/imx-regs.h +++ u-boot-usb-76454b2/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -246,6 +246,7 @@ struct aips_regs { #define IMX_RTIC_BASE (0x53FEC000) #define IMX_IIM_BASE (0x53FF0000) #define IMX_USB_BASE (0x53FF4000) +#define IMX_USB_PORT_OFFSET 0x200 #define IMX_CSI_BASE (0x53FF8000) #define IMX_DRYICE_BASE (0x53FFC000) diff --git u-boot-usb-76454b2.orig/arch/arm/include/asm/arch-mx31/imx-regs.h u-boot-usb-76454b2/arch/arm/include/asm/arch-mx31/imx-regs.h index 01a849d..ae3658b 100644 --- u-boot-usb-76454b2.orig/arch/arm/include/asm/arch-mx31/imx-regs.h +++ u-boot-usb-76454b2/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -895,6 +895,7 @@ struct esdc_regs { #define MX31_AIPS1_BASE_ADDR 0x43f00000 #define IMX_USB_BASE (MX31_AIPS1_BASE_ADDR + 0x88000) +#define IMX_USB_PORT_OFFSET 0x200 /* * CSPI register definitions diff --git u-boot-usb-76454b2.orig/drivers/usb/host/ehci-mxc.c u-boot-usb-76454b2/drivers/usb/host/ehci-mxc.c index 711c4a7..cd09462 100644 --- u-boot-usb-76454b2.orig/drivers/usb/host/ehci-mxc.c +++ u-boot-usb-76454b2/drivers/usb/host/ehci-mxc.c @@ -168,7 +168,7 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) udelay(80); ehci = (struct usb_ehci *)(IMX_USB_BASE + - (0x200 * CONFIG_MXC_USB_PORT)); + IMX_USB_PORT_OFFSET * CONFIG_MXC_USB_PORT); *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); *hcor = (struct ehci_hcor *)((uint32_t) *hccr + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));