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+Overview:
+=========
+The P4080 integrates a pre-boot-loader(PBL) which performs configuration
+registers read and write to initialize external memory devices such as I2c,
+eLBC FCM(NAND flash), eSDHC, or SPI interface, loads RCW and/or pre-boot
+initialization commands from those devices before the local cores are permitted
+to boot.
+
+Boot from SPI:
+==============
+
+The P4080 is capable of booting from SPI. The bootup process can be divided into
+two stages: the first stage will load RCW and write configuration registers to
+initialize SPI interface, and configure CPC1 as 1M SRAM, and loads U-boot image
+to CPC1. The second stage will configure all the hardware and boot up to U-Boot
+command line.
+
+The PBL image contains three parts, the first is RCW, the second is PBI commands
+performs configuration registers write, the third is the 512KB u-boot image. The
+PBL image is produced by tool pbl_image_tool.html.
+
+Build and boot steps
+--------------------
+
+1. Producing RCW
+Copy RCW of u-boot dump and paste it to tab "Tools" of the tool and choose
+"RCW[0:511] U-Boot CCSR Dump" and then click button "Decode PBL", switch to tab
+"Boot" and change PBI_SRC to "0b0101 - SPI 24b Addressing", change BOOT_LOC to
+"0b10000 - Memory Complex 1".
+
+2. Producing ACS File
+ make P4080DS_PBLSPI_config
+ make CROSS_COMPILE=powerpc-none-linux-gnuspe- all
+ xxd u-boot.bin > u-boot.xxd
+
+3. Producing PBI commands
+Switch to tab "PBI" and paste commands below into text field, then choose
+"ACS File (XXD Object Dump)", change Offset to "f80000", and click "Browse" to
+select the u-boot.xxd file produced in step 2, and click "Add PBI Data", after
+it finished, paste "09138000 00000000" and "091380c0 00000000" at the end.
+
+Below are Commands pasted before click "Add PBI Data".
+
+ PBI DATA | Description
+ -----------------------------------------
+ | 09010000 00200400 | CPCFI & |
+ | 09138000 00000000 | CPCLFC |
+ | 091380c0 00000100 | |
+ -----------------------------------------
+ | 09010100 00000000 | Configure |
+ | 09010104 fff0000b | CPC1 as |
+ | 09010f00 08000000 | 1M SRAM |
+ | 09010000 80000000 | |
+ -----------------------------------------
+ | 09000d00 00000000 | Configure |
+ | 09000d04 fff00000 | LAW of |
+ | 09000d08 81000013 | CPC1 |
+ -----------------------------------------
+ | 09000010 00000000 | Configure |
+ | 09000014 ff000000 | Alternate |
+ | 09000018 81000000 | |
+ -----------------------------------------
+ | 09110000 80000403 | Initialize |
+ | 09110020 2d170008 | SPI interface |
+ | 09110024 00100008 | |
+ | 09110028 00100008 | |
+ | 0911002c 00100008 | |
+ -----------------------------------------
+ | 09138000 00000000 | Flush command |
+ | 091380c0 00000000 | |
+ -----------------------------------------
+
+4. Producing PBL image
+ 1. Switch to tab "Tools" and click "Encode PBL", after it finished copy
+the encoded content to file and save as x.xxd.
+ 2. xxd -r x.xxd > pbl_u-boot.bin
+
+5. Put image to SPI flash
+ Put the pbl_u-boot.bin to SPI flash from offset 0.
+
+6. Change dip-switch
+ Change SW1[2] = off, then power on.
Signed-off-by: Shaohui Xie <b21989@freescale.com> --- doc/README.espi-boot-p4080ds | 82 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 82 insertions(+), 0 deletions(-) create mode 100644 doc/README.espi-boot-p4080ds