From patchwork Wed Aug 4 01:33:53 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cyril Chemparathy X-Patchwork-Id: 71807 X-Patchwork-Delegate: s-paulraj@ti.com Return-Path: X-Original-To: wd@gemini.denx.de Delivered-To: wd@gemini.denx.de Received: from diddl.denx.de (diddl.denx.de [10.0.0.6]) by gemini.denx.de (Postfix) with ESMTP id 1309628F for ; Wed, 4 Aug 2010 03:37:00 +0200 (CEST) Received: from diddl.denx.de (localhost.localdomain [127.0.0.1]) by diddl.denx.de (Postfix) with ESMTP id 0097630CF6C7 for ; Wed, 4 Aug 2010 03:37:00 +0200 (CEST) Received: from pop.mnet-online.de by diddl.denx.de with POP3 (fetchmail-6.3.17) for (single-drop); Wed, 04 Aug 2010 03:37:00 +0200 (CEST) Received: from murder ([192.168.8.180]) by backend2 (Cyrus v2.2.12) with LMTPA; Wed, 04 Aug 2010 03:34:45 +0200 X-Sieve: CMU Sieve 2.2 Received: from mail.m-online.net (localhost [127.0.0.1]) by frontend1.mail.m-online.net (Cyrus v2.2.12) with LMTPA; Wed, 04 Aug 2010 03:34:44 +0200 Received: from scanner-2.m-online.net (scanner-2.mail.m-online.net [192.168.8.166]) by mail.m-online.net (Postfix) with ESMTP id AB2481C0009F; Wed, 4 Aug 2010 03:34:44 +0200 (CEST) Received: from mxin-2.m-online.net ([192.168.1.21]) by scanner-2.m-online.net (scanner-2.m-online.net [192.168.8.166]) (amavisd-new, port 10026) with ESMTP id 19154-01; Wed, 4 Aug 2010 03:34:43 +0200 (CEST) Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by mxin-2.m-online.net (Postfix) with ESMTP id 016B0468D60; Wed, 4 Aug 2010 03:34:39 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2C74A2809A; Wed, 4 Aug 2010 03:34:27 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JD+dIHJa5Sor; Wed, 4 Aug 2010 03:34:26 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CEB3428089; Wed, 4 Aug 2010 03:34:18 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 60EF428088 for ; Wed, 4 Aug 2010 03:34:03 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SDDtUm10vXb1 for ; Wed, 4 Aug 2010 03:34:00 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by theia.denx.de (Postfix) with ESMTPS id 09BBD28089 for ; Wed, 4 Aug 2010 03:33:58 +0200 (CEST) Received: from dlep36.itg.ti.com ([157.170.170.91]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id o741Xubc022840 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Tue, 3 Aug 2010 20:33:56 -0500 Received: from legion.dal.design.ti.com (localhost [127.0.0.1]) by dlep36.itg.ti.com (8.13.8/8.13.8) with ESMTP id o741Xuwc029149; Tue, 3 Aug 2010 20:33:56 -0500 (CDT) Received: from gtrgwdeb (gtrgwdeb.telogy.design.ti.com [158.218.102.24]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id o741Xtf21087; Tue, 3 Aug 2010 20:33:55 -0500 (CDT) Received: by gtrgwdeb (Postfix, from userid 39959) id 5B37C1E297B; Tue, 3 Aug 2010 21:33:55 -0400 (EDT) From: Cyril Chemparathy To: u-boot@lists.denx.de, biggerbadderben@gmail.com, s-paulraj@ti.com Date: Tue, 3 Aug 2010 21:33:53 -0400 Message-Id: <1280885633-22185-3-git-send-email-cyril@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1280885633-22185-1-git-send-email-cyril@ti.com> References: <1280885633-22185-1-git-send-email-cyril@ti.com> Subject: [U-Boot] [PATCH 2/2] TI: add tnetv107x evm board support for cpsw X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de X-Virus-Scanned: by amavisd-new at m-online.net This patch adds the necessary board-level hookups to get the CPSW device working on tnetv107x evm boards. Signed-off-by: Cyril Chemparathy --- board/ti/tnetv107xevm/sdb_board.c | 155 +++++++++++++++++++++++++++++++++++++ include/configs/tnetv107x_evm.h | 16 ++++ 2 files changed, 171 insertions(+), 0 deletions(-) diff --git a/board/ti/tnetv107xevm/sdb_board.c b/board/ti/tnetv107xevm/sdb_board.c index 3ed1cfd..a7effd0 100644 --- a/board/ti/tnetv107xevm/sdb_board.c +++ b/board/ti/tnetv107xevm/sdb_board.c @@ -21,6 +21,7 @@ #include #include +#include #include #include #include @@ -139,6 +140,160 @@ int dram_init(void) return 0; } +#ifdef CONFIG_DRIVER_TI_CPSW + +#define PHY_PAGE 22 +#define PHY_MSCR 21 +#define PHY_CSCR 16 +#define PHY_PAGE_MSCR 2 +#define PHY_PAGE_DEFAULT 0 + +static void phy_init(char *name, int addr) +{ + unsigned short reg; + + /* Program RXID and TXID */ + if (miiphy_write(name, addr, PHY_PAGE, PHY_PAGE_MSCR) != 0) { + printf("failed to select mscr page\n"); + return; + } + + if (miiphy_read(name, addr, PHY_MSCR, ®) != 0) { + printf("failed to read mscr\n"); + return; + } + + reg |= 0x3 << 4; /* RXID and TXID */ + + if (miiphy_write(name, addr, PHY_MSCR, reg) != 0) { + printf("failed to write mscr\n"); + return; + } + + /* Program AutoCross */ + if (miiphy_write(name, addr, PHY_PAGE, PHY_PAGE_DEFAULT) != 0) { + printf("failed to select cscr page\n"); + return; + } + + reg = 0x0060; + if (miiphy_write(name, addr, PHY_CSCR, reg) != 0) { + printf("failed to write cscr\n"); + return; + } + + /* Enable Autonegotiation */ + if (miiphy_read(name, addr, PHY_BMCR, ®) != 0) { + printf("failed to read bmcr\n"); + return; + } + + reg |= PHY_BMCR_AUTON; + + if (miiphy_write(name, addr, PHY_BMCR, reg) != 0) { + printf("failed to write bmcr\n"); + return; + } + + /* Setup Advertisement */ + if (miiphy_read(name, addr, PHY_ANAR, ®) != 0) { + printf("failed to read anar\n"); + return; + } + + reg |= (0x1f << 5); + + if (miiphy_write(name, addr, PHY_ANAR, reg) != 0) { + printf("failed to write anar\n"); + return; + } + + /* PHY Soft Reset */ + if (miiphy_reset(name, addr) != 0) { + printf("failed to soft-reset phy\n"); + return; + } +} + +static void cpsw_control(int enabled) +{ + u32 vtp0_regs = TNETV107X_VTP_CNTRL_0; + u32 vtp1_regs = TNETV107X_VTP_CNTRL_1; + + + if (!enabled) { + clk_disable(TNETV107X_LPSC_ETHSS_RGMII); + clk_disable(TNETV107X_LPSC_ETHSS); + return; + } + + clk_enable(TNETV107X_LPSC_ETHSS); + clk_enable(TNETV107X_LPSC_ETHSS_RGMII); + + /* + * This piece of hardware is horribly mangled. For one, port + * 0 and port 1 configurations are strangely mixed up in the + * register space, i.e., writing to port 0 registers affects + * port 1 as well. Second, for some other equally mysterious + * reason, port 1 MUST be configured before port 0. + */ + __raw_writel(0x00000000, vtp1_regs + 0x04); /* single mode */ + __raw_writel(0x000f0000, vtp1_regs + 0x10); /* slew slowest */ + __raw_writel(0x00000002, vtp1_regs + 0x14); /* start */ + + __raw_writel(0x00000000, vtp0_regs + 0x04); /* single mode */ + __raw_writel(0x000f0000, vtp0_regs + 0x10); /* slew slowest */ + __raw_writel(0x00000002, vtp0_regs + 0x14); /* start */ +} + +static struct cpsw_slave_data cpsw_slaves[] = { + { + .slave_reg_ofs = 0x14, + .sliver_reg_ofs = 0x80, + .phy_id = 0, + }, + { + .slave_reg_ofs = 0x34, + .sliver_reg_ofs = 0xc0, + .phy_id = 1, + }, +}; + +static struct cpsw_platform_data cpsw_data = { + .mdio_base = TNETV107X_MDIO_BASE, + .cpsw_base = TNETV107X_CPSW_BASE, + .mdio_div = 0xff, + .channels = 8, + .cpdma_reg_ofs = 0x100, + .slaves = 2, + .slave_data = cpsw_slaves, + .ale_reg_ofs = 0x500, + .ale_entries = 1024, + .host_port_reg_ofs = 0x54, + .hw_stats_reg_ofs = 0x400, + .mac_control = (1 << 18) | /* IFCTLA */ + (1 << 15) | /* EXTEN */ + (1 << 5) | /* MIIEN */ + (1 << 4) | /* TXFLOWEN */ + (1 << 3), /* RXFLOWEN */ + .control = cpsw_control, + .phy_init = phy_init, +}; + +int board_eth_init(bd_t *bis) +{ + u32 latch = TNETV107X_ASYNC_EMIF_DATA_CE3_BASE; + + clk_enable(TNETV107X_LPSC_MDIO); + __raw_writel(0x00000000, latch); + udelay(1000); + __raw_writel(0xffffffff, latch); + udelay(1000); + + return cpsw_register(&cpsw_data); +} +#endif + #ifdef CONFIG_NAND_DAVINCI int board_nand_init(struct nand_chip *nand) { diff --git a/include/configs/tnetv107x_evm.h b/include/configs/tnetv107x_evm.h index 454e9b2..d3b509b 100644 --- a/include/configs/tnetv107x_evm.h +++ b/include/configs/tnetv107x_evm.h @@ -68,6 +68,17 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +/* Network Configuration */ +#define CONFIG_DRIVER_TI_CPSW +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI +#define CONFIG_PHY_GIGE + /* Flash and environment info */ #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND @@ -149,5 +160,10 @@ #define CONFIG_CMD_MEMORY #define CONFIG_CMD_NAND #define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_NFS +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING #endif /* __CONFIG_H */