diff mbox

[U-Boot] MIPS: Add initial support for EMMA3SL/LP

Message ID 1273758781-5895-1-git-send-email-ftrvxmtrx@gmail.com
State Rejected
Delegated to: Marek Vasut
Headers show

Commit Message

Serge Ziryukin May 13, 2010, 1:53 p.m. UTC
This patch adds initial support for EMMA3SL/LP board.
Network and USB support will be added as follow up patches.

Signed-off-by: Serge Ziryukin <ftrvxmtrx@gmail.com>
---
 MAINTAINERS                     |    4 +
 MAKEALL                         |    1 +
 Makefile                        |    3 +
 board/emma3sllp/Makefile        |   45 +++++++++
 board/emma3sllp/config.mk       |   28 ++++++
 board/emma3sllp/emma3sllp.c     |   39 ++++++++
 board/emma3sllp/emma3sllp.h     |   51 +++++++++++
 board/emma3sllp/lowlevel_init.S |  190 +++++++++++++++++++++++++++++++++++++++
 board/emma3sllp/u-boot.lds      |   70 ++++++++++++++
 doc/README.emma3sllp            |   10 ++
 include/configs/emma3sllp.h     |  131 +++++++++++++++++++++++++++
 11 files changed, 572 insertions(+), 0 deletions(-)
 create mode 100644 board/emma3sllp/Makefile
 create mode 100644 board/emma3sllp/config.mk
 create mode 100644 board/emma3sllp/emma3sllp.c
 create mode 100644 board/emma3sllp/emma3sllp.h
 create mode 100644 board/emma3sllp/lowlevel_init.S
 create mode 100644 board/emma3sllp/u-boot.lds
 create mode 100644 doc/README.emma3sllp
 create mode 100644 include/configs/emma3sllp.h

Comments

Marek Vasut March 31, 2012, 7:40 p.m. UTC | #1
Dear Serge Ziryukin,

> This patch adds initial support for EMMA3SL/LP board.
> Network and USB support will be added as follow up patches.
> 
> Signed-off-by: Serge Ziryukin <ftrvxmtrx@gmail.com>

Would you care to resubmit updated version of this patch please? Or shall I 
discard it?

Best regards,
Marek Vasut
Shinya Kuribayashi April 3, 2012, 10:46 a.m. UTC | #2
On Sun, Apr 1, 2012 at 4:40 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
>> This patch adds initial support for EMMA3SL/LP board.
>> Network and USB support will be added as follow up patches.
>>
>> Signed-off-by: Serge Ziryukin <ftrvxmtrx@gmail.com>
>
> Would you care to resubmit updated version of this patch please? Or shall I
> discard it?

This was posted by mistake, he was not allowed to make it public.  Also we
(Renesas) have no intention of mainlining it at the moment.

Please discard it.  I would give an official NACK, if necessary.

  Shinya
Marek Vasut April 3, 2012, 1:45 p.m. UTC | #3
Dear Shinya Kuribayashi,

> On Sun, Apr 1, 2012 at 4:40 AM, Marek Vasut <marek.vasut@gmail.com> wrote:
> >> This patch adds initial support for EMMA3SL/LP board.
> >> Network and USB support will be added as follow up patches.
> >> 
> >> Signed-off-by: Serge Ziryukin <ftrvxmtrx@gmail.com>
> > 
> > Would you care to resubmit updated version of this patch please? Or shall
> > I discard it?
> 
> This was posted by mistake, he was not allowed to make it public.  Also we
> (Renesas) have no intention of mainlining it at the moment.
> 
> Please discard it.  I would give an official NACK, if necessary.

All right, discarding. Mistakes happen, don't be angry at him ;-)

> 
>   Shinya

Best regards,
Marek Vasut
diff mbox

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 5cbc845..ec5927d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -841,6 +841,10 @@  Stefan Roese <sr@denx.de>
 
 	vct_xxx		MIPS32 4Kc
 
+Serge Ziryukin <ftrvxmtrx@gmail.com>
+
+	emma3sllp	MIPS32 4KEc
+
 #########################################################################
 # Nios-32 Systems:							#
 #									#
diff --git a/MAKEALL b/MAKEALL
index bb09627..75c07ef 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -741,6 +741,7 @@  LIST_arm="			\
 #########################################################################
 
 LIST_mips4kc="		\
+	emma3sllp	\
 	incaip		\
 	qemu_mips	\
 	vct_platinum	\
diff --git a/Makefile b/Makefile
index 82cbbf4..0bbbbf1 100644
--- a/Makefile
+++ b/Makefile
@@ -3408,6 +3408,9 @@  vct_platinumavc_onenand_small_config: unconfig
 	fi
 	@$(MKCONFIG) -a vct mips mips vct micronas
 
+emma3sllp_config:	unconfig
+	@$(MKCONFIG) $(@:_config=) mips mips emma3sllp
+
 #########################################################################
 ## MIPS32 AU1X00
 #########################################################################
diff --git a/board/emma3sllp/Makefile b/board/emma3sllp/Makefile
new file mode 100644
index 0000000..aa42b44
--- /dev/null
+++ b/board/emma3sllp/Makefile
@@ -0,0 +1,45 @@ 
+#
+# (C) Copyright 2003-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	= $(BOARD).o
+SOBJS	= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/emma3sllp/config.mk b/board/emma3sllp/config.mk
new file mode 100644
index 0000000..d4ff9b5
--- /dev/null
+++ b/board/emma3sllp/config.mk
@@ -0,0 +1,28 @@ 
+#
+# (C) Copyright 2010
+# Serge Ziryukin, ftrvxmtrx@gmail.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# EMMA3SL/LP
+#
+
+TEXT_BASE = 0xbc000000
diff --git a/board/emma3sllp/emma3sllp.c b/board/emma3sllp/emma3sllp.c
new file mode 100644
index 0000000..ff6e12a
--- /dev/null
+++ b/board/emma3sllp/emma3sllp.c
@@ -0,0 +1,39 @@ 
+/*
+ * (C) Copyright 2010
+ * Serge Ziryukin, ftrvxmtrx@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <configs/emma3sllp.h>
+#include <asm/io.h>
+#include "emma3sllp.h"
+
+phys_size_t initdram(int board_type)
+{
+	return CONFIG_SYS_SDRAM_SIZE;
+}
+
+int checkboard(void)
+{
+	puts("EMMA3SL/LP\n");
+
+	return 0;
+}
diff --git a/board/emma3sllp/emma3sllp.h b/board/emma3sllp/emma3sllp.h
new file mode 100644
index 0000000..335f6fd
--- /dev/null
+++ b/board/emma3sllp/emma3sllp.h
@@ -0,0 +1,51 @@ 
+/*
+ * (C) Copyright 2010
+ * Serge Ziryukin, ftrvxmtrx@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __EMMA3SLLP_H
+#define __EMMA3SLLP_H
+
+/* host interface */
+#define BHIF_BASE_ADDRESS	0xb0000000
+#define BHIF_ALTERNATE0	0x28
+
+/* rom interface */
+#define BROI_BASE_ADDRESS	0xb0000600
+#define BROI_ROM_MODE		0x00
+#define BROI_ROM_IF_MODE	0x08
+
+/* memory interface */
+#define MIF_BASE_ADDRESS	0xb0000c00
+#define MIF_CONFIG1		0x04
+#define MIF_INIT		0x08
+#define MIF_REFCNT		0x0c
+#define MIF_CONFIG2		0x10
+#define MIF_DLLSTBY		0xf0
+#define MIF_DLLCTRL		0xf4
+#define MIF_DLLOFSTW		0xf8
+#define MIF_DLLOFSTR		0xfc
+#define MIF_RSTB		0xe0
+#define MIF_ODTSW		0xe4
+#define MIF_IOLHRSTB		0xe8
+#define MIF_IOLHCTRL		0xec
+
+#endif /* __EMMA3SLLP_H */
diff --git a/board/emma3sllp/lowlevel_init.S b/board/emma3sllp/lowlevel_init.S
new file mode 100644
index 0000000..689e6dc
--- /dev/null
+++ b/board/emma3sllp/lowlevel_init.S
@@ -0,0 +1,190 @@ 
+/*
+ * (C) Copyright 2010
+ * Serge Ziryukin, ftrvxmtrx@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include "emma3sllp.h"
+
+.text
+.set noreorder
+.set mips32
+
+.macro REGWR offset, val
+	li t1, \val
+	sw t1, \offset(t0)
+.endm
+
+#define MEM_200US (200 * CPU_CLOCK_RATE / 1000000)
+
+.global lowlevel_init
+lowlevel_init:
+
+	/* =================================== */
+	/*          enable peripherals         */
+	/* =================================== */
+	li	t0, BHIF_BASE_ADDRESS
+
+	/* 17: usb, 18: ethernet, 19: fuart0 */
+	REGWR	BHIF_ALTERNATE0 0x000e0000
+
+	/* =================================== */
+	/*          set flash options          */
+	/* =================================== */
+	li	t0, BROI_BASE_ADDRESS
+
+	/* change max size flash rom to 64Mb
+	   to make it start from 0xbc000000 */
+	lw	t1, BROI_ROM_MODE(t0)
+	li	t2, 0x08
+	sub	t2, zero, t2
+	and	t1, t1, t2
+	ori	t1, t1, 0x04
+	sw	t1, BROI_ROM_MODE(t0)
+
+	/* enable write (for 4 possible flash chips) */
+	lw	t1, BROI_ROM_IF_MODE(t0)
+	ori	t1, t1, 0x0f
+	sw	t1, BROI_ROM_IF_MODE(t0)
+
+	/* =================================== */
+	/*          DDR2 initialization        */
+	/* =================================== */
+	li	t0, MIF_BASE_ADDRESS
+
+	/*
+	  set wiring delay
+	  91-467ps @ 327.68MHz
+	  110-440ps @ 333.33MHz
+	*/
+	REGWR	MIF_DLLOFSTW 0x0000e1e1
+	REGWR	MIF_DLLOFSTR 0x00002424
+
+	/* 316-350MHz (FSL=6) */
+	REGWR	MIF_DLLCTRL  0x00000020
+
+	/* exit from stand-by mode */
+	REGWR	MIF_DLLSTBY  0x00000000
+
+	/* clear rst */
+	REGWR	MIF_IOLHRSTB 0x00000001
+
+	/* wait until locked */
+	li	t2, 0x1
+1:
+	lw	t1, MIF_DLLCTRL(t0)
+	and	t1, t2
+	bne	t1, t2, 1b
+	nop
+
+	/* wait until fixed */
+	li	t2, 0x1
+1:
+	lw	t1, MIF_IOLHCTRL(t0)
+	and	t1, t2
+	bne	t1, t2, 1b
+	nop
+
+	/* clear rst */
+	REGWR	MIF_RSTB 0x00000001
+
+	/* set on-die termination to 75ohm and enable clock */
+	REGWR	MIF_ODTSW 0x00000101
+
+	/* 200us */
+	li	t2, MEM_200US
+1:
+	bne	t2, zero, 1b
+	addi	t2, -1
+
+	/*
+	  column 10 bits (A0 - A9), row 13 bits (A0 - A12)
+	  CAS latency 5, 16-bit bus, 4 banks
+	*/
+	REGWR	MIF_CONFIG1 0x74ba1b65
+
+	/* small PCB delay, one CS, 64Mb */
+	REGWR	MIF_CONFIG2 0x0aa20049
+
+	/* CKE high */
+	REGWR	MIF_INIT 0x00000020
+
+	/* 400ns */
+	.rept 16
+		nop
+	.endr
+
+	/* precharge all banks (BA0=0, BA1=0, A10=1) */
+	REGWR	MIF_INIT 0x10000004
+	/* EMRS(2): (BA1=1, BA0=0, Ax=0) */
+	REGWR	MIF_INIT 0x00020002
+	/* EMRS(3): (BA0=1, BA1=1, Ax=0) */
+	REGWR	MIF_INIT 0x00030002
+	/* EMRS(1): enable DLL (BA0=1, BA1=0, Ax=0) */
+	REGWR	MIF_INIT 0x00010002
+
+	/*
+	  MRS: reset DLL (A8=1), BL=4 (A1=1)
+	  CL=5 (A4=1, A6=1), WR=5 (A11=1)
+	*/
+	REGWR	MIF_INIT 0x25480002
+
+	/* 200us */
+	li	t2, MEM_200US
+1:
+	bne	t2, zero, 1b
+	addi	t2, -1
+
+	/* precharge all banks (BA0=0, BA1=0, A10=1) */
+	REGWR	MIF_INIT 0x10000004
+	/* refresh */
+	REGWR	MIF_INIT 0x00000001
+	/* refresh */
+	REGWR	MIF_INIT 0x00000001
+
+	/* 100ns */
+	.rept 4
+		nop
+	.endr
+
+	/*
+	  MRS: clear DLL reset flag (A8=0)
+	  leave other parms as in earlier issued MRS
+	*/
+	REGWR	MIF_INIT 0x21480002
+
+	/*
+	  EMRS(1): OCD calibration
+	  driver strength weak (A1=1), Rtt=75ohm (A2=1, A6=0)
+	*/
+	REGWR	MIF_INIT 0x00590002
+
+	/*
+	  set refresh interval to (0x50 * 16 * SCLK)
+	  register = (0x50 | REFRESH_ENABLE)
+	  REFRESH_ENABLE = 0x100
+	*/
+	REGWR	MIF_REFCNT 0x00000150
+
+	jr	ra
+	nop
diff --git a/board/emma3sllp/u-boot.lds b/board/emma3sllp/u-boot.lds
new file mode 100644
index 0000000..73979af
--- /dev/null
+++ b/board/emma3sllp/u-boot.lds
@@ -0,0 +1,70 @@ 
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk Engineering, <wd@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
+*/
+OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text       :
+	{
+	  *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata  : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+
+	. = ALIGN(4);
+	.data  : { *(.data) }
+
+	. = .;
+	_gp = ALIGN(16) + 0x7ff0;
+
+	.got : {
+	  __got_start = .;
+	  *(.got)
+	  __got_end = .;
+	}
+
+	.sdata  : { *(.sdata) }
+
+	.u_boot_cmd : {
+	  __u_boot_cmd_start = .;
+	  *(.u_boot_cmd)
+	  __u_boot_cmd_end = .;
+	}
+
+	uboot_end_data = .;
+	num_got_entries = (__got_end - __got_start ) >> 2;
+
+	. = ALIGN(4);
+	.sbss (NOLOAD)  : { *(.sbss) }
+	.bss (NOLOAD)  : { *(.bss) . = ALIGN(4); }
+	uboot_end = .;
+}
diff --git a/doc/README.emma3sllp b/doc/README.emma3sllp
new file mode 100644
index 0000000..dfefa9a
--- /dev/null
+++ b/doc/README.emma3sllp
@@ -0,0 +1,10 @@ 
+EMMA3SL/LP
+
+generation:        0x02000011 (EMMA3SL/L)
+product version:   0x018e
+cpu:               4KEc, 288MHz
+endianess:         big
+unified mem clock: 156MHz (SCLK = MCLK/2 = 312/2)
+flash:             S29GL064N90BFI04 (8Mb, 16bit, bottom boot)
+memory:            EDE5116AJBG-6E-E (64Mb, 16bit, 667Mbps)
+ethernet:          KSZ8041NL, RMII
diff --git a/include/configs/emma3sllp.h b/include/configs/emma3sllp.h
new file mode 100644
index 0000000..599104e
--- /dev/null
+++ b/include/configs/emma3sllp.h
@@ -0,0 +1,131 @@ 
+/*
+ * (C) Copyright 2010
+ * Serge Ziryukin, ftrvxmtrx@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/addrspace.h>
+
+#define CONFIG_BOOT_RETRY_TIME		-1
+#define CONFIG_MIPS32			1
+
+#define CPU_CLOCK_RATE			288000000
+
+#define CONFIG_BOOTDELAY		5
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#define CONFIG_TIMESTAMP
+#define CONFIG_CMDLINE_EDITING		1
+#define CONFIG_BOOTARGS		""
+#define CONFIG_EXTRA_ENV_SETTINGS	""
+#define CONFIG_BOOTCOMMAND		""
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_SAVEENV
+
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_PING
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_USB
+#undef CONFIG_CMD_FAT
+
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_UNZIP
+#define CONFIG_CMD_PORTIO
+
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT		"> "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_PBSIZE					\
+	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS		16
+
+/* 256Kb */
+#define CONFIG_SYS_MALLOC_LEN		(256 << 10)
+/* 64Kb */
+#define CONFIG_SYS_BOOTPARAMS_LEN	(64 << 10)
+
+#define CONFIG_SYS_HZ			1000
+#define CONFIG_SYS_MIPS_TIMER_FREQ	(CPU_CLOCK_RATE / 2)
+
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define CONFIG_SYS_SDRAM_SIZE		(64 << 20)
+#define CONFIG_NR_DRAM_BANKS		1
+
+#define CONFIG_SYS_LOAD_ADDR		0x80400000
+#define CONFIG_SYS_MEMTEST_START	0x80000000
+#define CONFIG_SYS_MEMTEST_END		0x80800000
+
+#define CONFIG_SYS_INIT_SP_OFFSET	0x400000
+
+/* one flash bank */
+#define PHYS_FLASH_1			0xbc000000
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	135
+#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
+#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
+#define CONFIG_SYS_FLASH_PROTECTION	1
+
+/* erase/write timeouts in ticks */
+#define CONFIG_SYS_FLASH_ERASE_TOUT	(2 * CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_WRITE_TOUT	(2 * CONFIG_SYS_HZ)
+
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+/* print 'E' for empty sector on flinfo */
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+
+#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN		0x40000
+
+/* env on flash */
+#define CONFIG_ENV_ADDR			\
+	(PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_SIZE		(64 << 10)
+#define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_OVERWRITE
+
+/* cache */
+#define CONFIG_SYS_DCACHE_SIZE		(8 << 10) /* 8kB */
+#define CONFIG_SYS_ICACHE_SIZE		(8 << 10) /* 8kB */
+#define CONFIG_SYS_CACHELINE_SIZE	16
+
+/* serial */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	4
+#define CONFIG_SYS_NS16550_CLK		18432000
+#define CONFIG_SYS_NS16550_COM1	0xb0101000
+#define CONFIG_SYS_NS16550_COM2	0xb0102000
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+#endif /* __CONFIG_H */