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[00/19] Add Cadence NAND Driver support

Message ID 20240919035512.13854-1-dinesh.maniyam@intel.com
Headers show
Series Add Cadence NAND Driver support | expand

Message

Maniyam, Dinesh Sept. 19, 2024, 3:54 a.m. UTC 
From: Dinesh Maniyam <dinesh.maniyam@intel.com>

This patchset add Cadence NAND driver support for
Intel Agilex5 devices.

The NAND driver is leveraged from the cadence-nand-controller.c
from Linux. U-Boot will support read, write and erase NAND with
Cadence driver. The driver further enhanced in U-Boot to support
NAND booting from FSBL and support boot to kernel
via UBIFS.

Dinesh Maniyam (19):
  dt: nand: add cadence nand dt-bindings
  arm: dts: agilex5: Enabled cdns-nand dts setting
  include: asm: Add support to read/write 64-bit
  drivers: mtd: nand: Add driver for Cadence Nand
  drivers: mtd: nand: cadence: Add support for read status command
  drivers: mtd: nand: cadence: Add support for readid command
  drivers: mtd: nand: cadence: Add support for NAND_CMD_PARAM
  drivers: mtd: nand: cadence: Support NAND_CMD_RESET
  drivers: mtd: nand: cadence: Support cmd SET_FEATURES & GET_FEATURES
  drivers: mtd: nand: cadence: Flush dma descriptor
  drivers: mtd: nand: cadence: Poll for desc complete status
  drivers: mtd: nand: cadence: Use bounce buffer
  drivers: nand: Enabled Kconfig and Makefile for cdns-nand
  configs: nand2_defconfig: Enable configs for nand boot
  drivers: mtd: nand: base: Add support for Hardware ECC for check bad
    block
  drivers: mtd: nand: spl: Add support for nand SPL load image
  drivers: mtd: nand: Enabled Kconfig and Makefile for Cadence-SPL
  drivers: mtd: nand: Kconfig: Remove SYS_NAND_BLOCK_SIZE dependency
  drivers: mtd: nand: Kconfig: Enabled self-init for cdns-nand SPL

 arch/arm/dts/socfpga_agilex5.dtsi             |   14 +
 .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi |   28 +
 arch/arm/include/asm/io.h                     |   25 +
 configs/socfpga_agilex5_nand2_defconfig       |  169 ++
 .../mtd/cadence,nand.yaml                     |   98 +
 drivers/mtd/nand/raw/Kconfig                  |   19 +-
 drivers/mtd/nand/raw/Makefile                 |    2 +
 drivers/mtd/nand/raw/cadence_nand.c           | 2386 +++++++++++++++++
 drivers/mtd/nand/raw/cadence_spl.c            |   96 +
 drivers/mtd/nand/raw/nand_base.c              |   71 +-
 include/cadence-nand.h                        |  528 ++++
 include/linux/mtd/rawnand.h                   |   13 +
 12 files changed, 3424 insertions(+), 25 deletions(-)
 create mode 100644 configs/socfpga_agilex5_nand2_defconfig
 create mode 100644 doc/device-tree-bindings/mtd/cadence,nand.yaml
 create mode 100644 drivers/mtd/nand/raw/cadence_nand.c
 create mode 100644 drivers/mtd/nand/raw/cadence_spl.c
 create mode 100644 include/cadence-nand.h

Comments

Alexander Dahl Sept. 19, 2024, 6:05 a.m. UTC | #1 
Hello Dinesh,

Am Thu, Sep 19, 2024 at 11:54:53AM +0800 schrieb dinesh.maniyam@intel.com:
> From: Dinesh Maniyam <dinesh.maniyam@intel.com>
> 
> This patchset add Cadence NAND driver support for
> Intel Agilex5 devices.
> 
> The NAND driver is leveraged from the cadence-nand-controller.c
> from Linux. U-Boot will support read, write and erase NAND with
> Cadence driver. The driver further enhanced in U-Boot to support
> NAND booting from FSBL and support boot to kernel
> via UBIFS.

Could you please add to your U-Boot commit messages the exact Linux
version you used for porting?  This makes it easier in the future to
re-import Linux bindings, dts, and driver updates to U-Boot.

Also avoid phrases like "This patch is to" in commit messages, this
adds redundancy for no reason.

Greets
Alex

> 
> Dinesh Maniyam (19):
>   dt: nand: add cadence nand dt-bindings
>   arm: dts: agilex5: Enabled cdns-nand dts setting
>   include: asm: Add support to read/write 64-bit
>   drivers: mtd: nand: Add driver for Cadence Nand
>   drivers: mtd: nand: cadence: Add support for read status command
>   drivers: mtd: nand: cadence: Add support for readid command
>   drivers: mtd: nand: cadence: Add support for NAND_CMD_PARAM
>   drivers: mtd: nand: cadence: Support NAND_CMD_RESET
>   drivers: mtd: nand: cadence: Support cmd SET_FEATURES & GET_FEATURES
>   drivers: mtd: nand: cadence: Flush dma descriptor
>   drivers: mtd: nand: cadence: Poll for desc complete status
>   drivers: mtd: nand: cadence: Use bounce buffer
>   drivers: nand: Enabled Kconfig and Makefile for cdns-nand
>   configs: nand2_defconfig: Enable configs for nand boot
>   drivers: mtd: nand: base: Add support for Hardware ECC for check bad
>     block
>   drivers: mtd: nand: spl: Add support for nand SPL load image
>   drivers: mtd: nand: Enabled Kconfig and Makefile for Cadence-SPL
>   drivers: mtd: nand: Kconfig: Remove SYS_NAND_BLOCK_SIZE dependency
>   drivers: mtd: nand: Kconfig: Enabled self-init for cdns-nand SPL
> 
>  arch/arm/dts/socfpga_agilex5.dtsi             |   14 +
>  .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi |   28 +
>  arch/arm/include/asm/io.h                     |   25 +
>  configs/socfpga_agilex5_nand2_defconfig       |  169 ++
>  .../mtd/cadence,nand.yaml                     |   98 +
>  drivers/mtd/nand/raw/Kconfig                  |   19 +-
>  drivers/mtd/nand/raw/Makefile                 |    2 +
>  drivers/mtd/nand/raw/cadence_nand.c           | 2386 +++++++++++++++++
>  drivers/mtd/nand/raw/cadence_spl.c            |   96 +
>  drivers/mtd/nand/raw/nand_base.c              |   71 +-
>  include/cadence-nand.h                        |  528 ++++
>  include/linux/mtd/rawnand.h                   |   13 +
>  12 files changed, 3424 insertions(+), 25 deletions(-)
>  create mode 100644 configs/socfpga_agilex5_nand2_defconfig
>  create mode 100644 doc/device-tree-bindings/mtd/cadence,nand.yaml
>  create mode 100644 drivers/mtd/nand/raw/cadence_nand.c
>  create mode 100644 drivers/mtd/nand/raw/cadence_spl.c
>  create mode 100644 include/cadence-nand.h
> 
> -- 
> 2.26.2
>