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[87.6.196.30]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-36bbcf0dc9asm4085699f8f.15.2024.08.03.04.10.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 04:10:34 -0700 (PDT) From: Christian Marangi To: Tom Rini , Lukasz Majewski , Sean Anderson , Ryder Lee , Weijie Gao , Chunfeng Yun , GSS_MTK_Uboot_upstream , Christian Marangi , u-boot@lists.denx.de Subject: [PATCH 00/15] clk: mediatek: mt7986: clk migration for OF_UPSTREAM Date: Sat, 3 Aug 2024 10:40:33 +0200 Message-ID: <20240803084050.449-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean These are all the required patches to migrate clk and correctly support OF_UPSTREAM. This will align the clk index to upstream to support the same clk implementation with downstream and upstream DTS. Christian Marangi (15): clk: mediatek: mt7986: fix wrong shift for PCIe clocks clk: mediatek: mt7986: rename CB_CKSQ_40M to TOP_XTAL clk: mediatek: mt7986: rename 66M_MCK to SYSAXI_D2 clk: mediatek: mt7986: fix wrong parent for INFRA_ADC_26M_CK clk: mediatek: mt7986: drop 1/1 infracfg spurious factor clk: mediatek: mt7986: add missing entry for IPCIE_PIPE_CK infra gate clk: mediatek: mt7986: fix typo for infra_i2c0_ck clk: mediatek: mt7986: rename TOPCKGEN factor clock to upstream naming clk: mediatek: mt7986: reorder TOPCKGEN factor ID clk: mediatek: mt7986: drop 1/1 spurious factor for topckgen clk: mediatek: mt7986: comment out CK_TOP_A_TUNER as not used clk: mediatek: mt7986: move INFRA_TRNG_CK to the bottom of the list clk: mediatek: mt7986: replace infracfg ID with upstream linux clk: mediatek: mt7986: convert to unified infracfg gates + muxes clk: mediatek: mt7986: rename CK to CLK arch/arm/dts/mt7986.dtsi | 95 ++-- drivers/clk/mediatek/clk-mt7986.c | 658 ++++++++++++------------- include/dt-bindings/clock/mt7986-clk.h | 359 ++++++-------- 3 files changed, 511 insertions(+), 601 deletions(-)