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Tue, 28 May 2024 15:35:26 +0200 (CEST) Received: from llp-tremmet2.phytec.de (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.6; Tue, 28 May 2024 15:35:25 +0200 From: Teresa Remmet To: CC: Yannic Moog , Fabio Estevam , Tom Rini , Benjamin Hahn , Yashwanth Varakala , Wadim Egorov , Subject: [PATCH 0/4] Support all phyCORE-i.MX8MP RAM variants Date: Tue, 28 May 2024 15:35:11 +0200 Message-ID: <20240528133515.307315-1-t.remmet@phytec.de> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [172.25.0.11] X-ClientProxiedBy: Florix.phytec.de (172.25.0.13) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOLMWRmVeSWpSXmKPExsWyRpKBR3fe3dA0g7kvhC0eXvW3mDppM7vF 272d7Bbd79QdWDx2zrrL7vHqwCp2j7N3djB69He3sAawRHHZpKTmZJalFunbJXBlLF+zl7ng NGfF57MHmRoYL7F3MXJySAiYSDTOmsPUxcjFISSwhEni8udZzBDOU0aJs3NXs4FUsQloSDxd cZoJxBYRkJJ42bkRrIhZ4DujxJyF/WCjhAVsJVYcaAErYhFQleh6fJgRxOYVsJD48+MaE8Q6 eYn9B88yQ8QFJU7OfMICYjMDxZu3zmaGsCUkDr54AWYLAcV3XTrJCNM77dxrZgg7VOLIptVM ExgFZiEZNQvJqFlIRi1gZF7FKJSbmZydWpSZrVeQUVmSmqyXkrqJERS4IgxcOxj75ngcYmTi YDzEKMHBrCTCe2ZSaJoQb0piZVVqUX58UWlOavEhRmkOFiVx3tUdwalCAumJJanZqakFqUUw WSYOTqkGRj11h7ywdYcNiksv7NkkOmlG7dImxdlvkup5pnxK7D3whOnUDsaFF0KPqPXukuTb x7XCQXuv8W8vR+5NMap3Jp6+yfK0LGAX20dxicY1TxeHu+Q9VuLfJW+eKM222KVG4+sSB5aq x8Z/3J76aO970/2b3VjGMNTqI9u7+nzXjHiB93t+zPHZosRSnJFoqMVcVJwIAJM2QQ9KAgAA X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add support for several RAM sizes and speed grades for phyCORE-i.MX8MP. We have support with this series for: - 1GB 1.5GHz - 1GB 2GHz - 2GB 1.5GHz (was supported before) - 2GB 2GHz (was supported before) - 4GB 1.5GHz - 4GB 2GHz - 8GB 2GHz RAM size and speed grade is detected and set using EEPROM data on default. Alternative it is possible to set fix RAM size and speed over Kconfig. Teresa Benjamin Hahn (1): board: phycore_imx8mp: enable setting 2GHz timings without RAM size Teresa Remmet (3): board: phytec: phycore-imx8mp: spl: Fix syle issue board: phytec: phycore_imx8mp: Add support for different RAM sizes board: phytec: phycore_imx8mp: Make RAM size configuration fix board/phytec/phycore_imx8mp/Kconfig | 67 ++++++++ board/phytec/phycore_imx8mp/lpddr4_timing.c | 153 +++++++++++++++++++ board/phytec/phycore_imx8mp/lpddr4_timing.h | 16 ++ board/phytec/phycore_imx8mp/phycore-imx8mp.c | 11 ++ board/phytec/phycore_imx8mp/spl.c | 136 +++++++++-------- include/configs/phycore_imx8mp.h | 4 +- 6 files changed, 322 insertions(+), 65 deletions(-) create mode 100644 board/phytec/phycore_imx8mp/lpddr4_timing.h