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SFS:(13230001)(366004)(44832011)(8676002)(54906003)(6916009)(8936002)(316002)(5660300002)(66476007)(6486002)(86362001)(966005)(66946007)(2906002)(66556008)(508600001)(83380400001)(36756003)(4326008)(2616005)(52116002)(38100700002)(1076003)(6512007)(6666004)(38350700002)(26005)(6506007)(186003); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: LE6izvWWjynTSKfP2pfAj2iMQs6BnNsIVcR0wSn2lBe1StvTbUHUAlSOYIqbzVPpMReJziyhuLoEZT6Z/xrE+UnZX6boGdzLGy6YKztpSptVjnuGnm6KH43FRiOhlHtxrAvbiodJtPRtt26uMdJPRn/9isuGa0tgAwMEG2RI5X6O9oBB3BdfFExShaKlcFwISHS8gF1yFrMah84KAn0SnxQsV9tbrc1fxhSdu7svPE2O4DAik/RhLuQWSGqC+way6wtp9LGJiTEuiNZam8uAgcJAXRSYefVjVy28oBH1xoFiHM1/xKCmW1mR+mErInBm/ccLIpRqdO/hvRhc+1wNdeSnaCgDWefsfbfGErBT2RiZWgpSuehbFwmatwL4rw2kdnaa7Cc+ZJf+56UnxX0Ok/cXiM1Mus4zjqCl8TMt1ACfLk2wIKXWCxx3uiL13G9Mll+fRV2nZP4/QjUOLgsinHtHFGhuvMTlaEv/XsTaT3yjs1JNjGtkxa5kh/aKKQry7l9d9aV6Y20oCusB4PAhGFF7/bpXnTkOw+nK6W9z8UX0l9cYwNSwwyLq9RhvfK9HC2dKR1+UQJrXSAkkBz/7KcMcVL7/mipLwO52iq16Tp96D5xHh/Y1Bc93OHkiEz4YANluJ+4AQD8IT76Sc8ZJy2MDUjAnkCdCB5SxAgREYy8sq1IJIDLwwo6uL+fXtoDU5hNgV19A/azDJwNLiSKc/p++BCFYmsSz4TbMGxt4tMVX7e9XbI7gpa5oCUKmoUPrcsSusYbLTYccOOmG53kNtAqxlYEYlH88RvTzAxnz/jm/qHtdyupFnQ47kokhsnJoi06IwulVz3/wdU6g0o7VYN9mjgJx7MQ7DadEsq7zbDMKhvno5elSg0HzfTzl+G1rlW681CnbamQJkdgFWrsnpAoPrKA4tcMudWaimObvHeYub/k6pD+6u/itr9TLC/iZENo5kJWx4OGtg7GR0VIAgXSN7mx9xbwtq6VmLRFuTrPCpahkt1+noi/144JED94PbPCJij2E499lprl2G7vGSpf+PWNpsy0TH10zi7rQ9RJoWatZSRiAQH3C2cx1AUexpPLtba8luusVpj2ijRcSB3oGwLbecRjxXZNbtZCJvwxp5sTrcssMpsEYIdeO8LekCLY5ehmYiMmg9Pu74z8OaBFIsQke35N2Miu4kJsmGikDOghH8XFPUak8Ks5NT4Dl7v3jgsyFfO8xZtX/jSD/zLVLbC6FxIfUqr0Jp+wSB6fV1+PktN2GF1hpCziFn3JwfYB8QdCXTpSBtAfytdXUTAc5XoGh1zXL6pcNhGiLSn7829O+UAPd/vqYtR+2T/a1u9qb4u7/h0YCyii0H47y1iQjJSShB3bTNkmabuqYadZ0Y/joD00mhSdYlVmqE7Tjseg6Zmb94rNGV71Ei2c/g5vBfLTNlsl49UCs3xB9oF9ZVPT7WOCxs8KTUsQOQaOQBhHymtpAMR4KT8X7IpaV6UO4ZpFerC9gz/ekAai6Ayn8nQsl1BrDMHD/oi0WdrgxeIwRm9EB4vAdFAPzOMLBgGJY073bw5Qb/lyGHLecJUdVx4y2JthKBbgsGHLylj4LZepUM7Kj3AXJCFUCCc99boiWgmRUpgayKnqcyWnSyTY= X-OriginatorOrg: seco.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8e53b449-a6fe-4980-34a1-08da02d7ba6a X-MS-Exchange-CrossTenant-AuthSource: DB7PR03MB4523.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Mar 2022 20:51:19.6186 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: bebe97c3-6438-442e-ade3-ff17aa50e733 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: QrgUtafz9UINFNUo8unLFnzJo/veIic8PhV911j/mndbDTnsnPgRi948fBJg+qNOi0aOk4m1C5McerEq+0+q7Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR03MB3105 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean This cleans up the semihosting code and adds the following new features: - hostfs support (like sandbox) - support for being used as a SPL boot device - serial device support - falling back to normal drivers if semihosting is disabled The main device affected by these changes is vexpress64, so I'd appreciate if Andre (or anyone else) could try booting. These changes are motivated by bringup for ls1046a. When forcing JTAG boot, this device disables most communication peripherals, including serial and ethernet devices. This appears to be fixed in later generation devices, but we are stuck with it for now. Semihosting provides an easy way to run a few console commands. The patches in this series are organized as follows: 0-4: rST conversions and other documentation updates 5-9: Semihosting cleanups 10-14: Filesystem support (including SPL boot device) 15-16: Serial support 16: Documentation update 17: JTAG boot support for LS1046A 19-25: Semihosting fallback 26-28: DM puts support The last two groups of patches are "bonus;" the first 17 patches stand on their own. The last two groups could be broken out as separate series, but I have kept them in this one to help with my sanity (and not have to deal with too many outstanding series). This series depends on [1]. Patch 17 depends on [2]. [1] https://lore.kernel.org/u-boot/CACRpkdZ+9fmNjC_mvrbPa9-iuTQVd8UkJ7Zpe7cL0c5vZygsVw@mail.gmail.com/T/ [2] https://lore.kernel.org/u-boot/20220222183840.1355337-2-sean.anderson@seco.com/ Changes in v2: - Document debug uart - Make CONFIG_SPL_SEMIHOSTING depend on SPL - Compile arch/arm/lib/semihosting.o in SPL - Rebase on Andre's series - Fix typos in commit message - Fix baud numbers being off by 10 - Rename non-DM driver struct to match format of other drivers - Add migration instructions for smhload - Add semihosting fallback implementation - Add implementation of puts for DM Sean Anderson (28): doc: Convert semihosting readme to rST nxp: ls1046ardb: Convert README to rST doc: ls1046ardb: Expand boot mode section doc: ls1046ardb: Document debug uart arm: smh: Add semihosting entry to MAINTAINERS arm: smh: Export semihosting functions arm: smh: Use numeric modes for smh_open arm: smh: Return errno on error arm: smh: Document functions in header arm: smh: Add some file manipulation commands spl: Add semihosting boot method fs: Add semihosting filesystem cmd: fdt: Use start/size for chosen instead of start/end arm: smh: Remove smhload command arm: smh: Add some functions for working with the host console serial: Add semihosting driver doc: smh: Update semihosting documentation ls1046ardb: Add support for JTAG boot arm64: Save esr in pt_regs arm64: Save spsr in pt_regs arm64: Import some ESR and SPSR defines from Linux arm: smh: Add option to detect semihosting arm: Catch non-emulated semihosting calls serial: smh: Initialize serial only if semihosting is enabled arm64: ls1046a: Support semihosting fallback serial: dm: Add support for puts serial: sandbox: Implement puts serial: smh: Implement puts for DM MAINTAINERS | 5 + arch/arm/Kconfig | 47 +++- arch/arm/cpu/armv8/exceptions.S | 9 +- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 3 + arch/arm/include/asm/esr.h | 343 ++++++++++++++++++++++++ arch/arm/include/asm/proc-armv/ptrace.h | 75 ++++++ arch/arm/include/asm/spl.h | 1 + arch/arm/include/asm/u-boot-arm.h | 7 +- arch/arm/lib/Makefile | 2 +- arch/arm/lib/interrupts_64.c | 80 ++++-- arch/arm/lib/semihosting.c | 230 ++++++++-------- arch/arm/mach-imx/imx8m/soc.c | 4 +- board/freescale/ls1046ardb/MAINTAINERS | 1 + board/freescale/ls1046ardb/README | 76 ------ board/freescale/ls1046ardb/ls1046ardb.c | 11 + cmd/fdt.c | 6 +- common/spl/Makefile | 1 + common/spl/spl_semihosting.c | 71 +++++ disk/part.c | 4 +- doc/README.semihosting | 38 --- doc/board/nxp/index.rst | 1 + doc/board/nxp/ls1046ardb.rst | 191 +++++++++++++ doc/usage/index.rst | 1 + doc/usage/semihosting.rst | 73 +++++ drivers/serial/Kconfig | 22 ++ drivers/serial/Makefile | 1 + drivers/serial/sandbox.c | 21 +- drivers/serial/serial-uclass.c | 27 +- drivers/serial/serial.c | 2 + drivers/serial/serial_semihosting.c | 168 ++++++++++++ fs/Makefile | 1 + fs/fs.c | 20 ++ fs/semihostingfs.c | 115 ++++++++ include/configs/ls1046ardb.h | 2 + include/configs/vexpress_aemv8.h | 10 +- include/fs.h | 1 + include/semihosting.h | 149 ++++++++++ include/semihostingfs.h | 21 ++ include/serial.h | 19 ++ 39 files changed, 1581 insertions(+), 278 deletions(-) create mode 100644 arch/arm/include/asm/esr.h delete mode 100644 board/freescale/ls1046ardb/README create mode 100644 common/spl/spl_semihosting.c delete mode 100644 doc/README.semihosting create mode 100644 doc/board/nxp/ls1046ardb.rst create mode 100644 doc/usage/semihosting.rst create mode 100644 drivers/serial/serial_semihosting.c create mode 100644 fs/semihostingfs.c create mode 100644 include/semihosting.h create mode 100644 include/semihostingfs.h