From patchwork Fri May 22 12:44:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Yadav X-Patchwork-Id: 1296234 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=OoVr6WYf; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49T5nN0Md4z9sSw for ; Fri, 22 May 2020 22:45:43 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 246C6816D8; Fri, 22 May 2020 14:45:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="OoVr6WYf"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BA5E381584; Fri, 22 May 2020 14:45:22 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 439C7813AB for ; Fri, 22 May 2020 14:45:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=p.yadav@ti.com Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 04MCjDKj075426; Fri, 22 May 2020 07:45:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1590151513; bh=HaH5RerXJtpGf2KpdExfY2QF8AmaTI+NWNpuH7Lcans=; h=From:To:CC:Subject:Date; b=OoVr6WYffAltqGaYao2b3ed7GmsZqC8IFO2UUbAPi5Y8+nqVXLup2LmICDWpUOOxD yjLVPwo8MYloSINen/eO7nboW5BnDqk4IlGEwh6JBmTXz8X/R5Lf6nmjC0DyswbmJa kV3hj1cQRJK8DIfgxSQWtNvuNUSoHmvOOKsQWPJ8= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 04MCjD57019745 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 22 May 2020 07:45:13 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 22 May 2020 07:45:12 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 22 May 2020 07:45:12 -0500 Received: from pratyush-OptiPlex-790.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 04MCjAoK091145; Fri, 22 May 2020 07:45:11 -0500 From: Pratyush Yadav To: Jagan Teki , Vignesh Raghavendra CC: Pratyush Yadav , , Sekhar Nori , Pragnesh Patel Subject: [PATCH v4 00/20] mtd: spi-nor-core: add xSPI Octal DTR support Date: Fri, 22 May 2020 18:14:49 +0530 Message-ID: <20200522124509.6901-1-p.yadav@ti.com> X-Mailer: git-send-email 2.25.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean Hi, This series adds support for octal DTR flashes in the spi-nor framework, and then adds hooks for the Cypress Semper flash which is an xSPI compliant Octal DTR flash. The Cadence QSPI controller driver is also updated to run in Octal DTR mode. Tested on TI J721e EVM. Changes in v4: - Fix BFPT parsing stopping too early for JESD216 rev B flashes. - Instead of just checking for spi_nor_get_protocol_width() in spi_nor_octal_dtr_enable(), make sure the protocol is SNOR_PROTO_8_8_8_DTR since get_protocol_width() only cares about data width. - Do not enable stateful X-X-X modes if the reset line is broken. - Instead of setting SNOR_READ_HWCAPS_8_8_8_DTR from Profile 1.0 table parsing, do it in spi_nor_info_init_params() instead based on the SPI_NOR_OCTAL_DTR_READ flag instead. - Set SNOR_HWCAPS_PP_8_8_8_DTR in s28hs post_sfdp hook since this capability is no longer set in Profile 1.0 parsing. - Rename spi_nor_cypress_octal_enable() to spi_nor_cypress_octal_dtr_enable(). - Instead of hard-coding 8D-8D-8D Fast Read dummy cycles to 20, find them out from the Profile 1.0 table. - Call post-bfpt fixup when exiting early because of JESD rev A. - Do not make an invalid Quad Enable BFPT field a fatal error. Silently ignore it by assuming no quad enable bit is present. - Set cmd.nbytes to 1 when using SPI_MEM_OP_CMD(). - Reject ops with more than 1 command byte in spi_mem_default_supports_op(). - Drop flag SPI_NOR_SOFT_RESET. Instead, discover soft reset capability via BFPT. - Add missing headers that were removed from common header. Changes in v3: - Read 2 bytes in Octal DTR mode when reading SR and FSR to avoid tripping up controllers. - Use op->data.nbytes as a measure of whether the data phase exists or not. This fixes data buswidth not being updadted for SR and FSR reads because they keep data buffer as NULL when calling spi_nor_setup_op(). - Add support for Micron mt35xu512aba to run in Octal DTR mode. Pratyush Yadav (20): spi: spi-mem: allow specifying whether an op is DTR or not spi: spi-mem: allow specifying a command's extension spi: cadence-qspi: Do not calibrate when device tree sets read delay spi: cadence-qspi: Add support for octal DTR flashes mtd: spi-nor-core: Add a ->setup() hook mtd: spi-nor-core: Move SFDP related declarations to top mtd: spi-nor-core: Introduce flash-specific fixup hooks mtd: spi-nor-core: Rework hwcaps selection mtd: spi-nor-core: Add support for DTR protocol mtd: spi-nor-core: prepare BFPT parsing for JESD216 rev D mtd: spi-nor-core: Get command opcode extension type from BFPT mtd: spi-nor-core: Parse xSPI Profile 1.0 table mtd: spi-nor-core: Prepare Read SR and FSR for Octal DTR mode mtd: spi-nor-core: Enable octal DTR mode when possible mtd: spi-nor-core: Do not make invalid quad enable fatal mtd: spi-nor-core: Detect Soft Reset sequence support from BFPT mtd: spi-nor-core: Perform a Soft Reset on shutdown mtd: spi-nor-core: Perform a Soft Reset on boot mtd: spi-nor-core: Add support for Cypress Semper flash mtd: spi-nor-core: Allow using Micron mt35xu512aba in Octal DTR mode drivers/mtd/spi/Kconfig | 11 + drivers/mtd/spi/sf_internal.h | 12 + drivers/mtd/spi/sf_probe.c | 9 + drivers/mtd/spi/spi-nor-core.c | 1253 ++++++++++++++++++++++++++------ drivers/mtd/spi/spi-nor-ids.c | 4 +- drivers/mtd/spi/spi-nor-tiny.c | 22 - drivers/spi/cadence_qspi.c | 87 ++- drivers/spi/cadence_qspi.h | 15 +- drivers/spi/cadence_qspi_apb.c | 286 +++++++- drivers/spi/spi-mem.c | 6 + include/linux/mtd/spi-nor.h | 275 +++++-- include/spi-mem.h | 17 +- 12 files changed, 1639 insertions(+), 358 deletions(-) --- 2.26.2