From patchwork Tue Mar 17 21:19:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Patra X-Patchwork-Id: 1256970 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=wdc.com header.i=@wdc.com header.a=rsa-sha256 header.s=dkim.wdc.com header.b=clcIbj1X; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48hmLj3SMMz9sPF for ; Wed, 18 Mar 2020 08:21:17 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 336E38152F; Tue, 17 Mar 2020 22:20:41 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=wdc.com header.i=@wdc.com header.b="clcIbj1X"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 6AE3B81496; Tue, 17 Mar 2020 22:20:21 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from esa5.hgst.iphmx.com (esa5.hgst.iphmx.com [216.71.153.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E550F814D6 for ; Tue, 17 Mar 2020 22:20:09 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=wdc.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=prvs=3382782c6=atish.patra@wdc.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1584480010; x=1616016010; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=S23qcWGzflW+NhSajdLHjz94EZAINZXmVkFmac20PMU=; b=clcIbj1XbCwd6je877SOtzVsNopH2XFYnVF9a2kgSsVUALMeQaTJlJIK F9EYqKkRMaMLk8BPRJTH0aDH2qX8TYYApbw7UZtnPDAm25byUjRF6vnAp RIXcs0ZQQrAQAdT/g7YNGi6PKAE9PY253Fnr4/Yy8+l8p/FF51YOwn6Xw QbAHl3cK6or48wQt0q+DCyBlAFAGBfE0kbk9mK/qnBtxNB84VDLHTO69I Q9fvYgQasqq1xtkXzIjPN/F6pfIAViJAYav3mDONz7aaLTGUjqHlH79NZ bT1KWWE08cJ9y1Bib23wagp0Hzeg5PI9//sSmm3wPLZNQ7ojCANQp5aH6 g==; IronPort-SDR: UHPtIf60POHx2BX1szxHLPghoYePG/2FKWxg4OMG28NokQnPTgU00NGKJqHDt+kqDRihKqbP4i w+p/jD0yvHziJIIrQaCj1KuRP3FHi8WMLpuVSWCWKKXxIQr1yJzyjUzzdqsPvbMMYk9/wOQwuu w3MwI4xOHGOYvgUe83gZcxlNIiTlOdRmXE3XOPWUhpiRyM6VxkWmEqYzK2r1I9ScuvCBdrkVs5 aEfzmroxJZhAIjgwhNYTOENZY/KxEFb47kM+Ee3vcv5DEENes64SXL6lSkbfC1l6UUM2fTFvXt DoU= X-IronPort-AV: E=Sophos;i="5.70,565,1574092800"; d="scan'208";a="133222677" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 18 Mar 2020 05:19:55 +0800 IronPort-SDR: 2D7dgabEeSNGa+W/DrFxh0krRDwmJO+4SphXNqoBFxRbG8nQ6vWi5RDM4H74fpm+q4H8PSm2ue ckYMHjyoOjQNnDMvAJ0+0sAGJkd5HsHp50zmaZPsoj3Q0aIryF4zPsw9awQlqtUWkiNofooq2N iKdnxfNeqsenkEdnU6UXhcL1PPOP4EF9xbwSq885qutInNAy1qF6+v7YraMXzgtkR9d+OWY9tn EJarVu5Euu/3cCbybsAV9WxKTgdopdeavkIhCJ6ypGe1eT9xmFLDg5DJc+IdbOX4DkFWQf9y0H pe28inGPFNgrQ0pE9A0uFrI5 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Mar 2020 14:11:22 -0700 IronPort-SDR: PMRfSjUEC3hM9uPglLl2MOhqo54zdtriFWSN36jWCp32+777Di1tNha3Npa+h4SmF/704PLseV ByRb2FTnin/eI0OGqCnaSvTYApqz02oMoY11Bki19u/w+53sKz6T3Jd6eGiQkuWB/6tCrsg9vy li6pt7cBH4m1pVd+2ymnbCFSYP7ncu+REadKpTcYjOs+atV6SQxcM+SBs4Vq4O5U9A5SLXmuSw X7UEu9b4DrOPIeQYl9OSKkKSL1dslR3macMMAotBiWbVbTd4W2w0zfJj4ib0tFi8AJMyEuHmKU OPc= WDCIronportException: Internal Received: from mccorma-lt.ad.shared (HELO yoda.hgst.com) ([10.86.54.125]) by uls-op-cesaip02.wdc.com with ESMTP; 17 Mar 2020 14:19:54 -0700 From: Atish Patra To: u-boot@lists.denx.de Cc: Atish Patra , Alexander Graf , Anup Patel , Bin Meng , Heinrich Schuchardt , Lukas Auer , Palmer Dabbelt , Rick Chen , abner.chang@hpe.com, daniel.schaefer@hpe.com Subject: [PATCH v3 0/5] DT related fixes for RISC-V UEFI Date: Tue, 17 Mar 2020 14:19:41 -0700 Message-Id: <20200317211946.28062-1-atish.patra@wdc.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean This series adds few DT related fixes required for Linux EFI stub to work on RISC-V. Patch 1 adds the boot hartid property under /chosen node. The related discussion can be found here. https://patchwork.ozlabs.org/patch/1233664/ https://lists.denx.de/pipermail/u-boot/2020-March/402085.html Patch 2 fixes a generic issue in bootefi. Patch 3,4,5 provide one of the option to update reserved-memory node for next stage. It depends on Bin's following series in OpenSBI http://lists.infradead.org/pipermail/opensbi/2020-March/001316.html The other options are SBI extension and trap/emulate on PMP csr access. The detaild discussion can be found here. https://github.com/riscv/riscv-sbi-doc/pull/37 Patch 1 & 2 can be applied independently from 3 and 4. I want to keep all the patches together to provide a holistic view of changes required for RISC-V UEFI. Changes from v2->v3: 1. Update the DT meant for OS if it is different from the one used by U-Boot 2. Use different FDT api to obtain "reg" address & size to honor the cell count. Changes from v1->v2: 1. Fix the issue if chosen node is not present. Changes from previous version: 1. Renamed the DT node property to "boot-hartid" from "efi-boot-hartid". 2. Changed the property type to u32 instead of u64 for RV32 compatibility. Atish Patra (5): riscv: Add boot hartid to Device tree cmd: bootefi: Parse reserved-memory node from DT riscv: Provide a mechanism to fix DT for reserved memory riscv: Setup reserved-memory node for FU540 riscv: Copy the reserved-memory nodes to final DT arch/riscv/cpu/start.S | 1 + arch/riscv/include/asm/global_data.h | 1 + arch/riscv/include/asm/u-boot-riscv.h | 1 + arch/riscv/lib/asm-offsets.c | 1 + arch/riscv/lib/bootm.c | 95 +++++++++++++++++++++++++++ board/sifive/fu540/fu540.c | 15 +++++ cmd/bootefi.c | 44 ++++++++++--- configs/sifive_fu540_defconfig | 1 + 8 files changed, 150 insertions(+), 9 deletions(-) --- 2.25.1