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[82.144.210.51]) by smtp.gmail.com with ESMTPSA id b17sm1185658lfp.15.2019.12.03.04.04.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Dec 2019 04:04:55 -0800 (PST) From: Igor Opaniuk To: u-boot@lists.denx.de Subject: [PATCH v2 0/2] android: colibri_imx7: reserve DDR memory for Cortex-M4 Date: Tue, 3 Dec 2019 14:04:45 +0200 Message-Id: <20191203120447.24820-1-igor.opaniuk@gmail.com> X-Mailer: git-send-email 2.17.1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefan Agner , "NXP i.MX U-Boot Team" Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de X-Virus-Status: Clean i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for the rpmsg communication. Both use cases need a fixed location of memory reserved. For the rpmsg use case the reserved area needs to be in sync with the kernel's hardcoded vring descriptor location. Introduce support for adding linux,usable-memory property to carve out 1MB of memory in case the M4 core is running. Also make sure that the i.MX 7 specific rpmsg driver does not get loaded in case we do not carve out memory. v2: - fixed build where CONFIG_ARCH_FIXUP_FDT_MEMORY is not set. Igor Opaniuk (2): common: fdt_support: add support for setting usable memory board: colibri_imx7: reserve DDR memory for Cortex-M4 arch/arm/include/asm/mach-imx/sys_proto.h | 2 ++ board/toradex/colibri_imx7/colibri_imx7.c | 37 +++++++++++++++++++++++ common/fdt_support.c | 35 +++++++++++++++++++++ include/fdt_support.h | 1 + 4 files changed, 75 insertions(+)