From patchwork Fri Oct 4 22:30:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dalon L Westergreen X-Patchwork-Id: 1172055 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 46lPjT6DVsz9sNw for ; Sat, 5 Oct 2019 08:31:07 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 593B8C21F49; Fri, 4 Oct 2019 22:30:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C4639C21E2F; Fri, 4 Oct 2019 22:30:57 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EF701C21DEC; Fri, 4 Oct 2019 22:30:55 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lists.denx.de (Postfix) with ESMTPS id 17ECCC21D4A for ; Fri, 4 Oct 2019 22:30:54 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Oct 2019 15:30:52 -0700 X-IronPort-AV: E=Sophos;i="5.67,257,1566889200"; d="scan'208";a="217306449" Received: from dwesterg-mobl.amr.corp.intel.com (HELO dwesterg-mobl1.amr.corp.intel.com) ([10.251.26.183]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Oct 2019 15:30:51 -0700 From: Dalon Westergreen To: u-boot@lists.denx.de, tien.fong.chee@intel.com, simon.k.r.goldschmidt@gmail.com, marex@denx.de, dinguyen@kernel.org, ley.foon.tan@intel.com, chin.liang.see@intel.com Date: Fri, 4 Oct 2019 15:30:35 -0700 Message-Id: <20191004223043.18127-1-dalon.westergreen@linux.intel.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Subject: [U-Boot] [PATCH 0/8] ARM: socfpga: arria10: Cleanup devicetree and X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Dalon Westergreen This series sync the arria10 devicetree to the kernel devicetree and cleans up the inclusion of u-boot specific requirements. It also adds a new qts-filter-a10.sh script to allow for generation of project specific settings required for configuration of the device clocks, PLLs, and pinmux. Dalon Westergreen (8): ARM: socfpga: arria10: Add qts-filter for arria10 socfpga ARM: socfpga: arria10: Sync A10 SoCDK devicetrees ARM: socfpga: arria10: Add common u-boot devicetree include ARM: socfpga: arria10: Add generic handoff devicetree include ARM: socfpga: arria10: Add handoff header for A10 SoCDK SDMMC ARM: socfpga: arria10: Add u-boot include for A10 SoCDK SDMMC devicetree ARM: socfpga: arria10: Remove old A10 SoCDK Handoff dtsi ARM: socfpga: Update README.socfpga to add qts-filter-a10 .../dts/socfpga_arria10-common-u-boot.dtsi | 206 +++++++++++ arch/arm/dts/socfpga_arria10.dtsi | 104 +++--- .../dts/socfpga_arria10_handoff_u-boot.dtsi | 232 +++++++++++- arch/arm/dts/socfpga_arria10_socdk.dtsi | 75 ++-- .../socfpga_arria10_socdk_sdmmc-u-boot.dtsi | 34 ++ arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 53 +-- .../socfpga_arria10_socdk_sdmmc_handoff.dtsi | 329 ------------------ .../dts/socfpga_arria10_socdk_sdmmc_handoff.h | 305 ++++++++++++++++ arch/arm/mach-socfpga/qts-filter-a10.sh | 141 ++++++++ doc/README.socfpga | 37 +- 10 files changed, 1035 insertions(+), 481 deletions(-) create mode 100644 arch/arm/dts/socfpga_arria10-common-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc-u-boot.dtsi delete mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.h create mode 100755 arch/arm/mach-socfpga/qts-filter-a10.sh