From patchwork Wed Dec 5 06:29:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1008019 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=brainfault.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=brainfault-org.20150623.gappssmtp.com header.i=@brainfault-org.20150623.gappssmtp.com header.b="scNmvIn4"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 438pkC5Bvxz9s7W for ; Wed, 5 Dec 2018 17:29:51 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 19C43C22473; Wed, 5 Dec 2018 06:29:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BE6FCC21FAE; Wed, 5 Dec 2018 06:29:43 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2C62CC21E36; Wed, 5 Dec 2018 06:29:42 +0000 (UTC) Received: from mail-pg1-f196.google.com (mail-pg1-f196.google.com [209.85.215.196]) by lists.denx.de (Postfix) with ESMTPS id 351CFC21C4A for ; Wed, 5 Dec 2018 06:29:39 +0000 (UTC) Received: by mail-pg1-f196.google.com with SMTP id n2so8549445pgm.3 for ; Tue, 04 Dec 2018 22:29:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=6Za3wbINR05h0Ln6DMlO/kt3wjeegiG/2y2xC8C9D5g=; b=scNmvIn41eqzRuFNwEsgcpUW6nx2D2NhE/0GvS19xtZNaJKGaxZ8JFYM48pVtX8JF5 v9CTaSDyiml2owjdNDGkM0wS4Cbmw90KEuo9VEoCujt0ufyDPqBsC4pSfa94ufhxd+J4 JBPZJfRoC9OGOVzWFj+ZXkDIbt0rLZFEJ1cnUBC1UZ4hbQUNhjn1i/U4jFOMxDWZH8Hb ScBIUvyCKrwxSdQCsl9t4yNqQ9hUsHINBOjhI+g4/noayCGO5QLy3TssnXUSOza8fR1k Xi9gyojYAdk0p35VmiS7kyg2e2Pq/d6TuaczO9Qj7t3spbplkAetwsxQFWwxTSSz6u3W 6slQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=6Za3wbINR05h0Ln6DMlO/kt3wjeegiG/2y2xC8C9D5g=; b=DOolf4njI0IInBuCh/a93Iw8DAeItUghol6v4sReUr6kgWEfSxrSxPkZrAUmktlYEf SG1uTU94AI0nAgN4AHf9p9TavHzKvgBUsO4FjB1jFF6XbcpE75JAEyh2g71KyXUApQ4n q6pLvkwhqLjHyBFp19kEW8Myg3hpf8P2hU0SmZKFkJl0WmuPsuiLTve6LS0tBKd7sKjc Dsn9Pf/LSm98iMQGFKydw6Fl9oTKwOTg1cOxIXynE2kB3gOwiGpa8GSWaGdXf2KVZn8I s4WcPzubX5ztQYZmSXAVFLIfRiwJKNYWF7ow+JE5pFCdsE5ETPONBVHWipaMM8aq2Rin pglQ== X-Gm-Message-State: AA+aEWZYZU+5mCMhEgErIUuTJALjPJb4udq0uu9zNdwtoKclbfkWfPvh zwl9gPwPShDPbkBjKvFffjQoHA== X-Google-Smtp-Source: AFSGD/VDGke+Je5lKNSIEM8zstZxmAo2XMcpQElWDCI+39YfvnBgutIAfubhJW29th8F1HoMjUu+wg== X-Received: by 2002:a62:56c7:: with SMTP id h68mr24270198pfj.134.1543991377262; Tue, 04 Dec 2018 22:29:37 -0800 (PST) Received: from anup-ubuntu64.qualcomm.com ([49.207.50.107]) by smtp.googlemail.com with ESMTPSA id s184sm43934545pgc.38.2018.12.04.22.29.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 04 Dec 2018 22:29:36 -0800 (PST) From: Anup Patel To: Rick Chen , Bin Meng , Lukas Auer Date: Wed, 5 Dec 2018 11:59:22 +0530 Message-Id: <20181205062924.26640-1-anup@brainfault.org> X-Mailer: git-send-email 2.17.1 Cc: U-Boot Mailing List , Palmer Dabbelt , Alexander Graf , Christoph Hellwig , Atish Patra Subject: [U-Boot] [PATCH 0/2] SiFive UART support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patchset adds SiFive UART driver for SiFive UART found on SiFive boards. The driver is tested on QEMU sifive_u machine. In fact, with this patchset same U-Boot binary boots on QEMU virt machine and QEMU sifive_u machine in both M-mode and S-mode. The patches are based upon latest RISC-V UBoot tree (git://git.denx.de/u-boot-riscv.git) at commit id ce41c65382300b4be2b84df3c06c2aa6c591741d Anup Patel (2): drivers: serial: Add SiFive UART driver riscv: qemu: Enable SiFive UART driver in defconfigs configs/qemu-riscv32_defconfig | 1 + configs/qemu-riscv32_smode_defconfig | 1 + configs/qemu-riscv64_defconfig | 1 + configs/qemu-riscv64_smode_defconfig | 1 + drivers/serial/Kconfig | 13 ++ drivers/serial/Makefile | 1 + drivers/serial/serial_sifive.c | 193 +++++++++++++++++++++++++++ 7 files changed, 211 insertions(+) create mode 100644 drivers/serial/serial_sifive.c