From patchwork Thu Jun 7 12:39:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Carlo Caione X-Patchwork-Id: 926294 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=caione.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="d48YO+1O"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 411lVV4zTtz9s01 for ; Thu, 7 Jun 2018 22:39:46 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 497F7C22047; Thu, 7 Jun 2018 12:39:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B615FC21F99; Thu, 7 Jun 2018 12:39:36 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5A1BFC21F00; Thu, 7 Jun 2018 12:39:34 +0000 (UTC) Received: from mail-wm0-f42.google.com (mail-wm0-f42.google.com [74.125.82.42]) by lists.denx.de (Postfix) with ESMTPS id EF26EC21EF0 for ; Thu, 7 Jun 2018 12:39:33 +0000 (UTC) Received: by mail-wm0-f42.google.com with SMTP id r125-v6so18761231wmg.2 for ; Thu, 07 Jun 2018 05:39:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id; bh=mjWFupkN7DKAQNZRy21Z2YNESGmty5SueBfRkOUhzrI=; b=d48YO+1Ourn0rl/7kDxR5BAoHBrcH0KLDGDcy7LQ3ZeH+WZ6MeG+USj6UTTLnZKDWD zJlhpB4hGtgkxHGN2AVL6YQif9UeF6GjOTNncMH6BeJopl+NUXThXmkx1nNF7/UDVMtQ 77Kdbekj7TM427sltOGhMIEh5egyR+lNRz9R5rB8nFQeREMQVsZgXRpy7/HjAXFoB0cH Php4Dmif5EWaBwUcuvxG28skuRVgZOIgyukWeYEJdKpETarBoiL8LTxVNS/a+OEKc36o /fbCvWazW1YzkVOLHtRek57yqdtLDUsmrVKiMxQv5RS1+6SNLLiZ4U3MnbeeDBbx6pfb KqYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=mjWFupkN7DKAQNZRy21Z2YNESGmty5SueBfRkOUhzrI=; b=hLS8jGZl63DVq1y50nJgTP3bGFsrRecJCLz37MBTR67zzwE+jK7E1BuWzQ68nsPWrY U6B8ZUqGWHK/cdm/75z0pWMWtV25fVDk9GWH7Bcrzge0g6069HKB4Ya3KcAgfvqrckfg tTfAG3iC00U2NO7qC9+E5VUQXZ1F6YIjDRyWpLIDwFJK/Rj4/hZWzEBz/k5I5KLpqHTK 8seAGgte8YGnwIh6Q0v0V1nXKIAQLi5jr5k5t+A51pglf4xnKHTyxEGuzX2BUNnMrzjU GPLqo6okzslX+12ZY4NtkjgXlgWgYjethl/PIPvGfiH9enV/Ku3MIjVzpG2UcpaS3Hc4 DUxg== X-Gm-Message-State: APt69E0y+j4676VxrnDqq4sfsAiYn1nh1lSb4u7n/diIGE5A/GvwMSbn 1vq3NKozB4E+zE70SNyCN+w= X-Google-Smtp-Source: ADUXVKIC7ObIzQeYy5EhMlLqsc+mYS71J75aOqookEE8wwzNNyKlUz+NsWueXYA4y+vh4Ts7a2BZ8Q== X-Received: by 2002:a1c:ed07:: with SMTP id l7-v6mr1625665wmh.139.1528375173549; Thu, 07 Jun 2018 05:39:33 -0700 (PDT) Received: from xps.home ([2a00:23c4:f78b:2a00:41a6:51cd:e2d8:d306]) by smtp.gmail.com with ESMTPSA id c201-v6sm3185668wmh.18.2018.06.07.05.39.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Jun 2018 05:39:32 -0700 (PDT) From: Carlo Caione To: sjg@chromium.org, philipp.tomsich@theobroma-systems.com, albert.u.boot@aribaud.net, u-boot@lists.denx.de, linux@endlessm.com Date: Thu, 7 Jun 2018 13:39:15 +0100 Message-Id: <20180607123918.15245-1-carlo@caione.org> X-Mailer: git-send-email 2.17.1 Cc: Carlo Caione Subject: [U-Boot] [PATCH 0/3] rk3288: veyron: Enable SDMMC when booting from SPI X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Carlo Caione These patches toghether with the previously submitted patch [0] enable the chromebook veyron jerry to use the SDMMC interface when U-Boot is not chainloaded by depthcharge but booted directly from SPI. [0] https://marc.info/?l=u-boot&m=152836928803742&w=2 Carlo Caione (3): rk3288: veyron: Init boot-on regulators rk3288: Disable JTAG function from sdmmc0 IO rockchip: veyron: Set vcc33_sd regulator value arch/arm/mach-rockchip/rk3288-board.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)