From patchwork Thu Jan 18 04:16:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 862742 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="plweKfhm"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zMVyM5MK9z9t2Q for ; Thu, 18 Jan 2018 15:16:27 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 48B99C21E40; Thu, 18 Jan 2018 04:16:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C4F6BC21DA6; Thu, 18 Jan 2018 04:16:22 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id AA45DC21CEC; Thu, 18 Jan 2018 04:16:21 +0000 (UTC) Received: from mail-pf0-f193.google.com (mail-pf0-f193.google.com [209.85.192.193]) by lists.denx.de (Postfix) with ESMTPS id 03EFFC21C2F for ; Thu, 18 Jan 2018 04:16:21 +0000 (UTC) Received: by mail-pf0-f193.google.com with SMTP id m26so13322405pfj.11 for ; Wed, 17 Jan 2018 20:16:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=/NzFHsfIaUHmsxSx+xVR06zg5iV0zMnCgX0icsWcL7E=; b=plweKfhm0dg5NYtnDuknONUKfw2EwW4JRpdmxOqqulgR2rSV15emKiAz+u6WA77xEt r7DBZPTePGGdCcSeZSiZsbc0uRz2AonQ/QQvmVkQeq36VRiffmx9eEy5ZHQiYt+mE1sA z7QdviqKCyuHRYT+cVwF+GtP/Wc8KfQ4yi57M5gjpTxaVhL04uHYD3yUiWJNign+ZWZn uc3mPZc9PhpEql5rsz/j1eU4gEYeb2Hxt0APG+hsFIuCRoB+CSqTUgSUE5YiZS2Clw19 CrgqrNZolZtcbcfjK3KKX2DFUQTez6ndC6tgh4gOB9HbTHTGLgC7phhC96Yam2TXC/Bo y9wA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=/NzFHsfIaUHmsxSx+xVR06zg5iV0zMnCgX0icsWcL7E=; b=qirTRLiFw18wMujAsCoVzAittpOHGd5ZBQtZ4Trj+OmZuyidqYzeT+pp1LtZBk0Fa3 WJ8/jYIGr4wZ0laghXZpcgVOiyoJhERJMLb87aoALtWvpOcLAqASVEzBbeSk80p+zMWQ 5LvInS24oaUp0Y/Yyas+/JYTr1C8RVA4m6jfUABwXQAgsbAzOCMVhMTPC2/0FgXv8ZOR IsZ8USH0yT9poH4mn7GKte/oMrWrWYhJ9It4gt66hPUzTVaXn5BxZd3I3furPvuX7Stg U3y0Ge+Em+oMFvGvLGKrJ5W4g2vF1zO1lD686J6YN7P1pQxfR0IffVC9J59QDwK9qJay Pe7g== X-Gm-Message-State: AKGB3mLRWbB9y815kdVuKY8wW1g+jhgbG7d7qo/wos656ouD/bwnjvj3 ELm+T5b/GaXF+OuEXT+XcVmRuLBG X-Google-Smtp-Source: ACJfBovG2X5XN2eF+6NbAlgyAHxDMwPLHREmGkQaf0e3oh1qcrovCO1apZCN3dPurA3V74xY57y4ig== X-Received: by 10.99.36.68 with SMTP id k65mr29520130pgk.345.1516248979368; Wed, 17 Jan 2018 20:16:19 -0800 (PST) Received: from chrisp-dl.ws.atlnz.lc ([2001:df5:b000:1::2]) by smtp.gmail.com with ESMTPSA id g8sm8234526pgs.55.2018.01.17.20.16.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 17 Jan 2018 20:16:18 -0800 (PST) From: Chris Packham To: u-boot@lists.denx.de Date: Thu, 18 Jan 2018 17:16:06 +1300 Message-Id: <20180118041610.20669-1-judge.packham@gmail.com> X-Mailer: git-send-email 2.15.1 Cc: Stefan Roese , Chris Packham Subject: [U-Boot] [PATCH v2 0/4] ddr: marvell: update DDR driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" I have a custom board that sees correctable ECC errors (when running memtester[1] from Linux). When I used Marvell's bootloader I didn't see the errors. I've also had a tame hardware engineer (if there is such a thing) looking at the timing waveforms comparing the stock u-boot behaviour against Marvell's bootloader. The changes for this series have been derived by comparing scope captures and register output between the same system running stock u-boot and Marvell's USP. Changes in v2: - Update tODT_OFF_WR as well - Added patches 2-4 Chris Packham (4): ddr: marvell: only assert M_ODT[0] on write for a single CS ddr: marvell: use correct TREFI value ddr: marvell: update additional ODT setting ddr: marvell: update ddr controller init and freq drivers/ddr/marvell/a38x/ddr3_init.h | 3 +- drivers/ddr/marvell/a38x/ddr3_topology_def.h | 3 +- drivers/ddr/marvell/a38x/ddr3_training.c | 50 +++++++++++++++--------- drivers/ddr/marvell/a38x/ddr3_training_db.c | 19 +++++---- drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c | 22 +++++++---- drivers/ddr/marvell/a38x/ddr3_training_static.c | 3 +- 6 files changed, 62 insertions(+), 38 deletions(-)