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[U-Boot,v2,0/4] ddr: marvell: update DDR driver

Message ID 20180118041610.20669-1-judge.packham@gmail.com
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Series ddr: marvell: update DDR driver | expand

Message

Chris Packham Jan. 18, 2018, 4:16 a.m. UTC 
I have a custom board that sees correctable ECC errors (when running
memtester[1] from Linux). When I used Marvell's bootloader I didn't
see the errors.

I've also had a tame hardware engineer (if there is such a thing)
looking at the timing waveforms comparing the stock u-boot behaviour
against Marvell's bootloader.

The changes for this series have been derived by comparing scope
captures and register output between the same system running stock
u-boot and Marvell's USP.

Changes in v2:
- Update tODT_OFF_WR as well
- Added patches 2-4

Chris Packham (4):
  ddr: marvell: only assert M_ODT[0] on write for a single CS
  ddr: marvell: use correct TREFI value
  ddr: marvell: update additional ODT setting
  ddr: marvell: update ddr controller init and freq

 drivers/ddr/marvell/a38x/ddr3_init.h             |  3 +-
 drivers/ddr/marvell/a38x/ddr3_topology_def.h     |  3 +-
 drivers/ddr/marvell/a38x/ddr3_training.c         | 50 +++++++++++++++---------
 drivers/ddr/marvell/a38x/ddr3_training_db.c      | 19 +++++----
 drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c | 22 +++++++----
 drivers/ddr/marvell/a38x/ddr3_training_static.c  |  3 +-
 6 files changed, 62 insertions(+), 38 deletions(-)

Comments

Stefan Roese Jan. 20, 2018, 8:59 a.m. UTC | #1 
Hi Chris,

On 18.01.2018 05:16, Chris Packham wrote:
> I have a custom board that sees correctable ECC errors (when running
> memtester[1] from Linux). When I used Marvell's bootloader I didn't
> see the errors.
> 
> I've also had a tame hardware engineer (if there is such a thing)
> looking at the timing waveforms comparing the stock u-boot behaviour
> against Marvell's bootloader.
> 
> The changes for this series have been derived by comparing scope
> captures and register output between the same system running stock
> u-boot and Marvell's USP.
> 
> Changes in v2:
> - Update tODT_OFF_WR as well
> - Added patches 2-4
> 
> Chris Packham (4):
>    ddr: marvell: only assert M_ODT[0] on write for a single CS
>    ddr: marvell: use correct TREFI value
>    ddr: marvell: update additional ODT setting
>    ddr: marvell: update ddr controller init and freq
> 
>   drivers/ddr/marvell/a38x/ddr3_init.h             |  3 +-
>   drivers/ddr/marvell/a38x/ddr3_topology_def.h     |  3 +-
>   drivers/ddr/marvell/a38x/ddr3_training.c         | 50 +++++++++++++++---------
>   drivers/ddr/marvell/a38x/ddr3_training_db.c      | 19 +++++----
>   drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c | 22 +++++++----
>   drivers/ddr/marvell/a38x/ddr3_training_static.c  |  3 +-
>   6 files changed, 62 insertions(+), 38 deletions(-)
> 

Big thanks for working on this. All patches:

Applied to u-boot-marvell/master.

Thanks,
Stefan