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[78.236.204.66]) by smtp.gmail.com with ESMTPSA id wr2sm52541996wjc.49.2016.04.15.23.35.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 15 Apr 2016 23:36:00 -0700 (PDT) From: Christophe Ricard X-Google-Original-From: Christophe Ricard To: jarkko.sakkinen@linux.intel.com Date: Sat, 16 Apr 2016 08:35:38 +0200 Message-Id: <1460788542-2455-9-git-send-email-christophe-h.ricard@st.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1460788542-2455-1-git-send-email-christophe-h.ricard@st.com> References: <1460788542-2455-1-git-send-email-christophe-h.ricard@st.com> X-Spam-Score: -1.6 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (christophe.ricard[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.0 AWL AWL: Adjusted score from AWL reputation of From: address X-Headers-End: 1arJpv-0007MZ-3t Cc: jean-luc.blanc@st.com, ashley@ashleylai.com, tpmdd-devel@lists.sourceforge.net, christophe-h.ricard@st.com, benoit.houyere@st.com Subject: [tpmdd-devel] [PATCH v3 08/12] tpm: tpm_tis: Add post_probe phy handler X-BeenThere: tpmdd-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Tpm Device Driver maintainance List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: tpmdd-devel-bounces@lists.sourceforge.net Add post_probe phy handler in order to execute additional proprietary operations after tpm2_probe. For the case of tpm_tis using LPC, itpm workaround probing. Signed-off-by: Christophe Ricard --- drivers/char/tpm/tpm_tis.c | 46 ++++++++++++++++++++++++++++++---------------- 1 file changed, 30 insertions(+), 16 deletions(-) diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c index ea95a82..236f644 100644 --- a/drivers/char/tpm/tpm_tis.c +++ b/drivers/char/tpm/tpm_tis.c @@ -657,14 +657,6 @@ static int tpm_mem_write32(struct tpm_chip *chip, u32 addr, u32 value) return 0; } -static const struct tpm_tis_phy_ops tpm_mem = { - .read_bytes = tpm_mem_read_bytes, - .write_bytes = tpm_mem_write_bytes, - .read16 = tpm_mem_read16, - .read32 = tpm_mem_read32, - .write32 = tpm_mem_write32, -}; - static irqreturn_t tis_int_handler(int dummy, void *dev_id) { struct tpm_chip *chip = dev_id; @@ -793,6 +785,32 @@ static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) return; } +static int tpm_tis_post_probe(struct tpm_chip *chip) +{ + int probe; + + if (!itpm) { + probe = probe_itpm(chip); + if (probe < 0) + return -ENODEV; + itpm = !!probe; + } + + if (itpm) + dev_info(chip->dev.parent, "Intel iTPM workaround enabled\n"); + + return 0; +} + +static const struct tpm_tis_phy_ops tpm_mem = { + .read_bytes = tpm_mem_read_bytes, + .write_bytes = tpm_mem_write_bytes, + .read16 = tpm_mem_read16, + .read32 = tpm_mem_read32, + .write32 = tpm_mem_write32, + .post_probe = tpm_tis_post_probe, +}; + static bool interrupts = true; module_param(interrupts, bool, 0444); MODULE_PARM_DESC(interrupts, "Enable interrupts"); @@ -817,7 +835,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info, { u32 vendor, intfcaps, intmask; u8 rid; - int rc, probe; + int rc; struct tpm_chip *chip; struct tpm_tis_lpc_phy *phy; @@ -887,18 +905,14 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info, (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", vendor >> 16, rid); - if (!itpm) { - probe = probe_itpm(chip); - if (probe < 0) { + if (phy->priv.phy_ops->post_probe) { + rc = phy->priv.phy_ops->post_probe(chip); + if (rc < 0) { rc = -ENODEV; goto out_err; } - itpm = !!probe; } - if (itpm) - dev_info(dev, "Intel iTPM workaround enabled\n"); - /* Figure out the capabilities */ rc = tpm_read32(chip, TPM_INTF_CAPS(phy->priv.locality), &intfcaps); if (rc < 0)