@@ -15,7 +15,7 @@
" bne,pn %%icc, 1b\n" \
" mov 0, %0\n" \
"3:\n" \
- " .section .fixup,#alloc,#execinstr\n" \
+ " .section .fixup,\"ax\"\n" \
" .align 4\n" \
"4: sethi %%hi(3b), %0\n" \
" jmpl %0 + %%lo(3b), %%g0\n" \
@@ -73,7 +73,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
__asm__ __volatile__(
"\n1: casa [%4] %%asi, %3, %1\n"
"2:\n"
- " .section .fixup,#alloc,#execinstr\n"
+ " .section .fixup,\"ax\"\n"
" .align 4\n"
"3: sethi %%hi(2b), %0\n"
" jmpl %0 + %%lo(2b), %%g0\n"
@@ -92,13 +92,13 @@ __asm__ __volatile__( \
"1:\t" "st"#size " %1, %2\n\t" \
"clr %0\n" \
"2:\n\n\t" \
- ".section .fixup,#alloc,#execinstr\n\t" \
+ ".section .fixup,\"ax\"\n\t" \
".align 4\n" \
"3:\n\t" \
"b 2b\n\t" \
" mov %3, %0\n\t" \
".previous\n\n\t" \
- ".section __ex_table,#alloc\n\t" \
+ ".section __ex_table,\"a\"\n\t" \
".align 4\n\t" \
".word 1b, 3b\n\t" \
".previous\n\n\t" \
@@ -160,14 +160,14 @@ __asm__ __volatile__( \
"1:\t" "ld"#size " %2, %1\n\t" \
"clr %0\n" \
"2:\n\n\t" \
- ".section .fixup,#alloc,#execinstr\n\t" \
+ ".section .fixup,\"ax\"\n\t" \
".align 4\n" \
"3:\n\t" \
"clr %1\n\t" \
"b 2b\n\t" \
" mov %3, %0\n\n\t" \
".previous\n\t" \
- ".section __ex_table,#alloc\n\t" \
+ ".section __ex_table,\"a\"\n\t" \
".align 4\n\t" \
".word 1b, 3b\n\n\t" \
".previous\n\t" \
@@ -96,7 +96,7 @@ __asm__ __volatile__( \
"1:\t" "st"#size " %1, [%2]\n\t" \
"clr %0\n" \
"2:\n\n\t" \
- ".section .fixup,#alloc,#execinstr\n\t" \
+ ".section .fixup,\"ax\"\n\t" \
".align 4\n" \
"3:\n\t" \
"sethi %%hi(2b), %0\n\t" \
@@ -128,7 +128,7 @@ __asm__ __volatile__( \
"1:\t" "st"#size "a %1, [%2] %%asi\n\t" \
"clr %0\n" \
"2:\n\n\t" \
- ".section .fixup,#alloc,#execinstr\n\t" \
+ ".section .fixup,\"ax\"\n\t" \
".align 4\n" \
"3:\n\t" \
"sethi %%hi(2b), %0\n\t" \
@@ -169,7 +169,7 @@ __asm__ __volatile__( \
"1:\t" "ld"#size " [%2], %1\n\t" \
"clr %0\n" \
"2:\n\n\t" \
- ".section .fixup,#alloc,#execinstr\n\t" \
+ ".section .fixup,\"ax\"\n\t" \
".align 4\n" \
"3:\n\t" \
"sethi %%hi(2b), %0\n\t" \
@@ -207,7 +207,7 @@ __asm__ __volatile__( \
"1:\t" "ld"#size "a [%2] %%asi, %1\n\t" \
"clr %0\n" \
"2:\n\n\t" \
- ".section .fixup,#alloc,#execinstr\n\t" \
+ ".section .fixup,\"ax\"\n\t" \
".align 4\n" \
"3:\n\t" \
"sethi %%hi(2b), %0\n\t" \
@@ -33,7 +33,7 @@ static int ftrace_modify_code(unsigned long ip, u32 old, u32 new)
" flush %[ip]\n"
" mov 0, %[faulted]\n"
"2:\n"
- " .section .fixup,#alloc,#execinstr\n"
+ " .section .fixup,\"ax\"\n"
" .align 4\n"
"3: sethi %%hi(2b), %[faulted]\n"
" jmpl %[faulted] + %%lo(2b), %%g0\n"
@@ -950,7 +950,7 @@ EXPORT_SYMBOL(sun4v_chip_type)
prom_tba: .xword 0
tlb_type: .word 0 /* Must NOT end up in BSS */
EXPORT_SYMBOL(tlb_type)
- .section ".fixup",#alloc,#execinstr
+ .section .fixup,"ax"
ENTRY(__retl_efault)
retl
@@ -58,7 +58,7 @@
0: retl
mov 0, %o0
- .section __ex_table,#alloc
+ .section __ex_table,"a"
.word 4b, retl_efault
.word 5b, retl_efault
.word 6b, retl_efault
@@ -137,7 +137,7 @@
0: retl
mov 0, %o0
- .section __ex_table,#alloc
+ .section __ex_table,"a"
.word 4b, retl_efault
.word 5b, retl_efault
.word 6b, retl_efault
@@ -18,19 +18,15 @@
#include <asm/thread_info.h>
#include <asm/export.h>
-/* Work around cpp -rob */
-#define ALLOC #alloc
-#define EXECINSTR #execinstr
-
#define EX_ENTRY(l1, l2) \
- .section __ex_table,ALLOC; \
+ .section __ex_table,"a"; \
.align 4; \
.word l1, l2; \
.text;
#define EX(x,y,a,b) \
98: x,y; \
- .section .fixup,ALLOC,EXECINSTR; \
+ .section .fixup,"ax"; \
.align 4; \
99: retl; \
a, b, %o0; \
@@ -38,7 +34,7 @@
#define EX2(x,y,c,d,e,a,b) \
98: x,y; \
- .section .fixup,ALLOC,EXECINSTR; \
+ .section .fixup,"ax"; \
.align 4; \
99: c, d, e; \
retl; \
@@ -51,14 +47,14 @@
#define LD(insn, src, offset, reg, label) \
98: insn [%src + (offset)], %reg; \
- .section .fixup,ALLOC,EXECINSTR; \
+ .section .fixup,"ax"; \
99: ba label; \
mov offset, %g5; \
EX_ENTRY(98b, 99b)
#define ST(insn, dst, offset, reg, label) \
98: insn %reg, [%dst + (offset)]; \
- .section .fixup,ALLOC,EXECINSTR; \
+ .section .fixup,"ax"; \
99: ba label; \
mov offset, %g5; \
EX_ENTRY(98b, 99b)
@@ -90,7 +86,7 @@
ST(std, dst, offset + 0x10, t4, bigchunk_fault) \
ST(std, dst, offset + 0x18, t6, bigchunk_fault)
- .section .fixup,#alloc,#execinstr
+ .section .fixup,"ax"
bigchunk_fault:
sub %g7, %g5, %o0
and %g1, 127, %g1
@@ -106,7 +102,7 @@
ST(st, dst, -(offset + 0x08), t2, lastchunk_fault) \
ST(st, dst, -(offset + 0x04), t3, lastchunk_fault)
- .section .fixup,#alloc,#execinstr
+ .section .fixup,"ax"
lastchunk_fault:
and %g1, 15, %g1
retl
@@ -130,7 +126,7 @@
ST(stb, dst, -(offset + 0x02), t0, halfchunk_fault) \
ST(stb, dst, -(offset + 0x01), t1, halfchunk_fault)
- .section .fixup,#alloc,#execinstr
+ .section .fixup,"ax"
halfchunk_fault:
and %o2, 15, %o2
sub %o3, %g5, %o3
@@ -144,7 +140,7 @@
ST(stb, dst, -(offset + 0x02), t0, last_shortchunk_fault) \
ST(stb, dst, -(offset + 0x01), t1, last_shortchunk_fault)
- .section .fixup,#alloc,#execinstr
+ .section .fixup,"ax"
last_shortchunk_fault:
and %o2, 1, %o2
retl
@@ -384,7 +380,7 @@ __copy_user: /* %o0=dst %o1=src %o2=len */
b copy_user_last7
mov %o2, %g1
- .section .fixup,#alloc,#execinstr
+ .section .fixup,"ax"
.align 4
97:
retl
@@ -186,7 +186,7 @@
retl
clr %o0
- .section .fixup,#alloc,#execinstr
+ .section .fixup,"ax"
.align 4
30:
and %o1, 0x7f, %o1
@@ -29,7 +29,7 @@ static int read_mcd_tag(unsigned long addr)
"1: ldxa [%[addr]] %[asi], %[ver]\n"
" mov 0, %[err]\n"
"2:\n"
- " .section .fixup,#alloc,#execinstr\n"
+ " .section .fixup,\"ax\"\n"
" .align 4\n"
"3: sethi %%hi(2b), %%g1\n"
" jmpl %%g1 + %%lo(2b), %%g0\n"
@@ -106,7 +106,7 @@ static int set_mcd_tag(unsigned long addr, u8 ver)
"1: stxa %[ver], [%[addr]] %[asi]\n"
" mov 0, %[err]\n"
"2:\n"
- " .section .fixup,#alloc,#execinstr\n"
+ " .section .fixup,\"ax\"\n"
" .align 4\n"
"3: sethi %%hi(2b), %%g1\n"
" jmpl %%g1 + %%lo(2b), %%g0\n"