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[2/2] sparc32: fix mm_cpumask maintenance causing missing TLB flushing

Message ID 20210616104534.1614087-3-npiggin@gmail.com
State New
Headers show
Series couple of sparc 32 mm fixes | expand

Commit Message

Nicholas Piggin June 16, 2021, 10:45 a.m. UTC 
Fix a bug in mm_cpumask maintenance where a CPU can have switched to an
mm but it's not present in the cpumask, resulting in possible lost TLB
flushes. switch_mm() can be called without switching thread (exec(2),
kthread_use_mm()). Move mm_cpumask setting there, matching sparc64.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arch/sparc/include/asm/switch_to_32.h | 1 -
 arch/sparc/mm/srmmu.c                 | 3 +++
 2 files changed, 3 insertions(+), 1 deletion(-)
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Patch

diff --git a/arch/sparc/include/asm/switch_to_32.h b/arch/sparc/include/asm/switch_to_32.h
index 42eeafcb8a41..1d9855abbc00 100644
--- a/arch/sparc/include/asm/switch_to_32.h
+++ b/arch/sparc/include/asm/switch_to_32.h
@@ -58,7 +58,6 @@  extern struct thread_info *current_set[NR_CPUS];
 #define switch_to(prev, next, last) do {						\
 	SWITCH_ENTER(prev);								\
 	SWITCH_DO_LAZY_FPU(next);							\
-	cpumask_set_cpu(smp_processor_id(), mm_cpumask(next->active_mm));		\
 	__asm__ __volatile__(								\
 	"sethi	%%hi(here - 0x8), %%o7\n\t"						\
 	"mov	%%g6, %%g3\n\t"								\
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index fefbd08bdc91..dc07b3d68fc1 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -473,6 +473,9 @@  void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm,
 {
 	unsigned long flags;
 
+	if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm)))
+		cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
+
 	if (mm->context == NO_CONTEXT) {
 		spin_lock_irqsave(&srmmu_context_spinlock, flags);
 		alloc_context(old_mm, mm);