From patchwork Fri Dec 16 18:35:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Kravetz X-Patchwork-Id: 706526 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3tgJvl0kngz9t3K for ; Sat, 17 Dec 2016 05:37:39 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1761909AbcLPShX (ORCPT ); Fri, 16 Dec 2016 13:37:23 -0500 Received: from userp1040.oracle.com ([156.151.31.81]:45071 "EHLO userp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761741AbcLPShP (ORCPT ); Fri, 16 Dec 2016 13:37:15 -0500 Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by userp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id uBGIZxmB029802 (version=TLSv1 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Fri, 16 Dec 2016 18:36:00 GMT Received: from userv0122.oracle.com (userv0122.oracle.com [156.151.31.75]) by aserv0021.oracle.com (8.13.8/8.14.4) with ESMTP id uBGIZwLA021690 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Fri, 16 Dec 2016 18:35:59 GMT Received: from abhmp0002.oracle.com (abhmp0002.oracle.com [141.146.116.8]) by userv0122.oracle.com (8.14.4/8.14.4) with ESMTP id uBGIZwh8020133; Fri, 16 Dec 2016 18:35:58 GMT Received: from monkey.oracle.com (/50.188.161.229) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Fri, 16 Dec 2016 10:35:58 -0800 From: Mike Kravetz To: sparclinux@vger.kernel.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org Cc: "David S . Miller" , Bob Picco , Nitin Gupta , Vijay Kumar , Julian Calaby , Adam Buchbinder , "Kirill A . Shutemov" , Michal Hocko , Andrew Morton , Mike Kravetz Subject: [RFC PATCH 07/14] sparc64: move COMPUTE_TAG_TARGET and COMPUTE_TSB_PTR to header file Date: Fri, 16 Dec 2016 10:35:30 -0800 Message-Id: <1481913337-9331-8-git-send-email-mike.kravetz@oracle.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1481913337-9331-1-git-send-email-mike.kravetz@oracle.com> References: <1481913337-9331-1-git-send-email-mike.kravetz@oracle.com> X-Source-IP: aserv0021.oracle.com [141.146.126.233] Sender: sparclinux-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: sparclinux@vger.kernel.org Move macros COMPUTE_TSB_PTR and COMPUTE_TSB_PTR out of .S file to headers so that they can be used in other files. Also, add new macro IF_TLB_TYPE_NOT_HYPE Signed-off-by: Mike Kravetz --- arch/sparc/include/asm/tsb.h | 38 ++++++++++++++++++++++++++++++++++++++ arch/sparc/kernel/sun4v_tlb_miss.S | 29 ++--------------------------- 2 files changed, 40 insertions(+), 27 deletions(-) diff --git a/arch/sparc/include/asm/tsb.h b/arch/sparc/include/asm/tsb.h index 311cd4e..bb7df61 100644 --- a/arch/sparc/include/asm/tsb.h +++ b/arch/sparc/include/asm/tsb.h @@ -75,6 +75,44 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; extern struct kmem_cache *shared_mmu_ctx_cachep __read_mostly; #endif + + /* + * If tlb type is not hypervisor, branch to label + */ +#define IF_TLB_TYPE_NOT_HYPE(TMP, NOT_HYPE_LABEL) \ + sethi %hi(tlb_type), TMP; \ + lduw [TMP + %lo(tlb_type)], TMP; \ + cmp TMP, 3; \ + bne,pn %icc, NOT_HYPE_LABEL; \ + nop + + /* DEST = (VADDR >> 22) + * + * Branch to ZERO_CTX_LABEL if context is zero. + */ +#define COMPUTE_TAG_TARGET(DEST, VADDR, CTX, ZERO_CTX_LABEL) \ + srlx VADDR, 22, DEST; \ + brz,pn CTX, ZERO_CTX_LABEL; \ + nop; + + /* Create TSB pointer. This is something like: + * + * index_mask = (512 << (tsb_reg & 0x7UL)) - 1UL; + * tsb_base = tsb_reg & ~0x7UL; + * tsb_index = ((vaddr >> HASH_SHIFT) & tsb_mask); + * tsb_ptr = tsb_base + (tsb_index * 16); + */ +#define COMPUTE_TSB_PTR(TSB_PTR, VADDR, HASH_SHIFT, TMP1, TMP2) \ + and TSB_PTR, 0x7, TMP1; \ + mov 512, TMP2; \ + andn TSB_PTR, 0x7, TSB_PTR; \ + sllx TMP2, TMP1, TMP2; \ + srlx VADDR, HASH_SHIFT, TMP1; \ + sub TMP2, 1, TMP2; \ + and TMP1, TMP2, TMP1; \ + sllx TMP1, 4, TMP1; \ + add TSB_PTR, TMP1, TSB_PTR; + #define TSB_LOAD_QUAD(TSB, REG) \ 661: ldda [TSB] ASI_NUCLEUS_QUAD_LDD, REG; \ .section .tsb_ldquad_phys_patch, "ax"; \ diff --git a/arch/sparc/kernel/sun4v_tlb_miss.S b/arch/sparc/kernel/sun4v_tlb_miss.S index 6179e19..46fbc16 100644 --- a/arch/sparc/kernel/sun4v_tlb_miss.S +++ b/arch/sparc/kernel/sun4v_tlb_miss.S @@ -3,6 +3,8 @@ * Copyright (C) 2006 */ +#include + .text .align 32 @@ -16,33 +18,6 @@ ldx [BASE + HV_FAULT_D_ADDR_OFFSET], VADDR; \ ldx [BASE + HV_FAULT_D_CTX_OFFSET], CTX; - /* DEST = (VADDR >> 22) - * - * Branch to ZERO_CTX_LABEL if context is zero. - */ -#define COMPUTE_TAG_TARGET(DEST, VADDR, CTX, ZERO_CTX_LABEL) \ - srlx VADDR, 22, DEST; \ - brz,pn CTX, ZERO_CTX_LABEL; \ - nop; - - /* Create TSB pointer. This is something like: - * - * index_mask = (512 << (tsb_reg & 0x7UL)) - 1UL; - * tsb_base = tsb_reg & ~0x7UL; - * tsb_index = ((vaddr >> HASH_SHIFT) & tsb_mask); - * tsb_ptr = tsb_base + (tsb_index * 16); - */ -#define COMPUTE_TSB_PTR(TSB_PTR, VADDR, HASH_SHIFT, TMP1, TMP2) \ - and TSB_PTR, 0x7, TMP1; \ - mov 512, TMP2; \ - andn TSB_PTR, 0x7, TSB_PTR; \ - sllx TMP2, TMP1, TMP2; \ - srlx VADDR, HASH_SHIFT, TMP1; \ - sub TMP2, 1, TMP2; \ - and TMP1, TMP2, TMP1; \ - sllx TMP1, 4, TMP1; \ - add TSB_PTR, TMP1, TSB_PTR; - sun4v_itlb_miss: /* Load MMU Miss base into %g2. */ ldxa [%g0] ASI_SCRATCHPAD, %g2