From patchwork Tue Jan 10 23:17:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kirill Tkhai X-Patchwork-Id: 135325 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E0C74B6EE8 for ; Wed, 11 Jan 2012 10:27:24 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756923Ab2AJX1V (ORCPT ); Tue, 10 Jan 2012 18:27:21 -0500 Received: from forward9.mail.yandex.net ([77.88.61.48]:53643 "EHLO forward9.mail.yandex.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756852Ab2AJX1T (ORCPT ); Tue, 10 Jan 2012 18:27:19 -0500 X-Greylist: delayed 617 seconds by postgrey-1.27 at vger.kernel.org; Tue, 10 Jan 2012 18:27:18 EST Received: from smtp8.mail.yandex.net (smtp8.mail.yandex.net [77.88.61.54]) by forward9.mail.yandex.net (Yandex) with ESMTP id A4DDBCE23B4; Wed, 11 Jan 2012 03:16:58 +0400 (MSK) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yandex.ru; s=mail; t=1326237418; bh=np2oQ/PBA3MW1HnyjccYPEN15qssD8hBOzYb7zDhyAY=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:Content-Transfer-Encoding:Mime-Version; b=X/h3yq1Xyk3OfakYdlFSc1wyXN/TCDQs3MOUS95AnKsODwwKdmpakS2TnDkWr7aD6 bNmxS8XsWXWixAe1oeEhpHG1w8TvON7uhdfqvtqav9hLJW7y+gFBaUReN02eYEAZ4W fPxFi4yRpLE2wgH4HcTtf9ENtyupKZ2gYrmBqJDg= Received: from smtp8.mail.yandex.net (localhost [127.0.0.1]) by smtp8.mail.yandex.net (Yandex) with ESMTP id 7525A1B606FC; Wed, 11 Jan 2012 03:16:58 +0400 (MSK) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yandex.ru; s=mail; t=1326237418; bh=np2oQ/PBA3MW1HnyjccYPEN15qssD8hBOzYb7zDhyAY=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:Content-Transfer-Encoding:Mime-Version; b=X/h3yq1Xyk3OfakYdlFSc1wyXN/TCDQs3MOUS95AnKsODwwKdmpakS2TnDkWr7aD6 bNmxS8XsWXWixAe1oeEhpHG1w8TvON7uhdfqvtqav9hLJW7y+gFBaUReN02eYEAZ4W fPxFi4yRpLE2wgH4HcTtf9ENtyupKZ2gYrmBqJDg= Received: from 95-25-28-18.broadband.corbina.ru (95-25-28-18.broadband.corbina.ru [95.25.28.18]) by smtp8.mail.yandex.net (nwsmtp/Yandex) with ESMTP id GwqqFnFj-GwqGIWwF; Wed, 11 Jan 2012 03:16:58 +0400 X-Yandex-Spam: 1 Message-ID: <1326237423.7307.13.camel@hp> Subject: [PATCH]sparc32: forced setting of mode of sun4m per-cpu timers From: Kirill Tkhai To: David Miller Cc: sparclinux@vger.kernel.org, sam@ravnborg.org, tkhai1@yandex.ru Date: Wed, 11 Jan 2012 03:17:03 +0400 In-Reply-To: <20120109.141452.388652017181678757.davem@davemloft.net> References: <1325885691.21461.8.camel@hp> <20120109.141452.388652017181678757.davem@davemloft.net> X-Mailer: Evolution 3.2.2-1 Mime-Version: 1.0 Sender: sparclinux-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: sparclinux@vger.kernel.org SUN4M per-cpu timers have two modes of work. These are timer mode and counter mode. Kernel doesn't write anything to the register, which is connected with mode choice. So, the mode is chosen by bootloader. This patch forces to use timer mode from the kernel and to be independent of bootloader. I had this problem with OpenBIOS. Timers don't tick and kernel fails on QEMU, when it's compiled with SMP support. The patch fixes problem. Signed-off-by: Tkhai Kirill Acked-by: Sam Ravnborg --- -- To unsubscribe from this list: send the line "unsubscribe sparclinux" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index 422c16d..e611651 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -399,6 +399,9 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn) timers_global = (void __iomem *) (unsigned long) addr[num_cpu_timers]; + /* Every per-cpu timer works in timer mode */ + sbus_writel(0x00000000, &timers_global->timer_config); + sbus_writel((((1000000/HZ) + 1) << 10), &timers_global->l10_limit); master_l10_counter = &timers_global->l10_count;