From patchwork Fri Jul 21 14:44:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Kardashevskiy X-Patchwork-Id: 792159 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xDYTY1Lttz9t1y for ; Sat, 22 Jul 2017 00:45:21 +1000 (AEST) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3xDYTX6yxQzDqvk for ; Sat, 22 Jul 2017 00:45:20 +1000 (AEST) X-Original-To: slof@lists.ozlabs.org Delivered-To: slof@lists.ozlabs.org Received: from ozlabs.ru (ozlabs.ru [107.173.13.209]) by lists.ozlabs.org (Postfix) with ESMTP id 3xDYTP4kWPzDqvT for ; Sat, 22 Jul 2017 00:45:13 +1000 (AEST) Received: from vpl2.ozlabs.ibm.com (localhost [IPv6:::1]) by ozlabs.ru (Postfix) with ESMTP id 25C193A6008A; Fri, 21 Jul 2017 10:45:34 -0400 (EDT) From: Alexey Kardashevskiy To: slof@lists.ozlabs.org Date: Sat, 22 Jul 2017 00:44:33 +1000 Message-Id: <20170721144433.27719-6-aik@ozlabs.ru> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170721144433.27719-1-aik@ozlabs.ru> References: <20170721144433.27719-1-aik@ozlabs.ru> Subject: [SLOF] [PATCH slof v2 5/5] pci-scan: Fix pci-bridge-set-mem-base and pci-bridge-set-mem-limit X-BeenThere: slof@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "Patches for https://github.com/aik/SLOF" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: slof-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "SLOF" The functions used a bogus mixture between programming the registers with pci-next-mem64 and pci-next-mem - the upper register bits were filled with the value from the 64-bit memory space while the lower bits were filled with the bits from the 32-bit memory space variable. This separates pci-next-mem64 handling from pci-next-mem. Suggested-by: Thomas Huth Signed-off-by: Alexey Kardashevskiy --- slof/fs/pci-scan.fs | 61 ++++++++++++++++++++++++++++------------------------- 1 file changed, 32 insertions(+), 29 deletions(-) diff --git a/slof/fs/pci-scan.fs b/slof/fs/pci-scan.fs index 5abf6a8..ecabe57 100644 --- a/slof/fs/pci-scan.fs +++ b/slof/fs/pci-scan.fs @@ -113,6 +113,17 @@ here 100 allot CONSTANT pci-device-vec pci-next-mem64 @ 0<> and ; +: pci-next-mem64-align ( align -- pci-next-mem64 ) + pci-next-mem64 @ swap #aligned + dup pci-next-mem64 x! +; + +: pci-next-mem64-align-extend ( align extend -- pci-next-mem ) + pci-next-mem64 @ + + swap #aligned + dup pci-next-mem64 x! +; + : pci-next-mem-align-1mb ( -- pci-next-mem ) pci-next-mem @ 100000 #aligned \ align to 1MB boundary @@ -126,23 +137,20 @@ here 100 allot CONSTANT pci-device-vec dup pci-next-mem ! ; -\ Update pci-next-mem to be 1MB aligned and set the mem-base and mem-base-upper register -\ and set the Limit register to the maximum available address space -\ needed for scanning possible devices behind the bridge +\ Update pci-next-mem (or mem64) to be aligned and set the mem-base and +\ mem-base-upper register. Also set the Limit register to the maximum available +\ address space needed for scanning possible devices behind the bridge : pci-bridge-set-mem-base ( addr -- ) dup pci-bridge-has-mem64 \ check if 64bit support IF \ IF 64 bit support - pci-next-mem-align-1mb - pci-next-mem64 @ 100000000 #aligned \ | read the current Value of 64-bit and align to 4GB boundary - dup 100000000 + pci-next-mem64 x! \ | and write back with 1GB for bridge - 2 pick swap \ | - 20 rshift \ | keep upper 32 bits - swap 28 + rtas-config-l! \ | and write it into the Base-Upper32-bits - pci-max-mem64 @ 20 rshift \ | fetch max Limit address and keep upper 32 bits - 2 pick 2C + rtas-config-l! \ | and set the Limit - 10 rshift \ | keep upper 16 bits - pci-max-mem @ 1- FFFF0000 and or \ | and Insert mmem Limit (set it to max) - swap 24 + rtas-config-l! \ | and write it into the bridge + 100000000 pci-next-mem64-align + \ Set base and limit registers: + 20 rshift over 28 + rtas-config-l! \ | set prefetch base upper 32 bits + pci-next-mem64 @ 10 rshift FFF0 and + pci-max-mem64 @ 1- FFF00000 and or + over 24 + rtas-config-l! \ | set prefetch limit & base lower + pci-max-mem64 @ 1- 20 rshift + swap 2C + rtas-config-l! \ | and set the limit upper 32 bits ELSE pci-next-mem-align-1mb 10 rshift \ | keep upper 16 bits @@ -152,24 +160,19 @@ here 100 allot CONSTANT pci-device-vec THEN ; -\ Update pci-next-mem to be 1MB aligned and set the mem-limit register -\ The Limit Value is one less then the upper boundary -\ If the limit is less than the base the mem is disabled +\ Update pci-next-mem (or -mem64) to be aligned (with some additional space +\ for hot-plugging later) and set the mem-limit register. The Limit Value is +\ one less then the upper boundary. : pci-bridge-set-mem-limit ( addr -- ) dup pci-bridge-has-mem64 \ check if 64bit support IF \ IF 64 bit support - pci-next-mem-extend-1mb - 1- \ | make limit one less than boundary - pci-next-mem64 @ 100000000 #aligned \ | Reat current value of 64-bar and align at 4GB - dup pci-next-mem64 x! \ | and write it back - 1- \ | make limite one less than boundary - 2 pick swap \ | - 20 rshift \ | keep upper 32 bits - swap 2C + rtas-config-l! \ | and write it into the Limit-Upper32-bits - FFFF0000 and \ | keep upper 16 bits - over 24 + rtas-config-l@ - 0000FFFF and \ | fetch original Value - or swap 24 + rtas-config-l! \ | and write it into the bridge + 100000000 80000000 pci-next-mem64-align-extend + \ Update the limit registers: + 1- + 20 rshift + over 2C + rtas-config-l! \ | set the limit upper 32 bits + pci-next-mem64 @ 1- 10 rshift + swap 26 + rtas-config-w! \ | set limit lower bits ELSE \ Update current variable (add space for hot-plugging and align it) pci-next-mem-extend-1mb