| Message ID | 92f8d6f42dbe4b602a00c2b70becbe5faea014ae.camel@kernel.crashing.org |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [v2] xive: Disable block tracker | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | master/apply_patch Successfully applied |
| snowpatch_ozlabs/make_check | success | Test make_check on branch master |
On 08/01/2018 04:02 PM, Benjamin Herrenschmidt wrote: > Due to some HW errata, the block tracking facility (performance optimisation > for large systems) should be disabled on Nimbus chips. Disable it unconditionally > for now. > > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> As I understand it, this feature is tightly coupled with the update of the block scope tables which track which XIVE blocks are active in which chips. The current XIVE configuration is set to "one block per chip" and the chip id is used as a block identifier. The block scope table are not used and not even initialized by skiboot. Reviewed-by: Cédric Le Goater <clg@kaod.org> C. > --- > v2. Fix typo in comment > > --- a/hw/xive.c > +++ b/hw/xive.c > @@ -1762,9 +1762,11 @@ static bool xive_config_init(struct xive *x) > val |= VC_SBC_CONF_NO_UPD_PRF; > xive_regw(x, VC_SBC_CONFIG, val); > > - /* Enable block tracking */ > + /* Disable block tracking on Nimbus (we may want to enable > + * it on Cumulus later). HW Erratas. > + */ > val = xive_regr(x, PC_TCTXT_TRACK); > - val |= PC_TCTXT_TRACK_EN; > + val &= ~PC_TCTXT_TRACK_EN; > xive_regw(x, PC_TCTXT_TRACK, val); > > /* Enable relaxed ordering of trigger forwarding */ > > _______________________________________________ > Skiboot mailing list > Skiboot@lists.ozlabs.org > https://lists.ozlabs.org/listinfo/skiboot >
Benjamin Herrenschmidt <benh@kernel.crashing.org> writes: > Due to some HW errata, the block tracking facility (performance optimisation > for large systems) should be disabled on Nimbus chips. Disable it unconditionally > for now. > > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> > --- > v2. Fix typo in comment Merged to master as of 7db7c9f652295a47b7fed0fb62787ab795216a18 and running through tests for 6.0.x now.
--- a/hw/xive.c +++ b/hw/xive.c @@ -1762,9 +1762,11 @@ static bool xive_config_init(struct xive *x) val |= VC_SBC_CONF_NO_UPD_PRF; xive_regw(x, VC_SBC_CONFIG, val); - /* Enable block tracking */ + /* Disable block tracking on Nimbus (we may want to enable + * it on Cumulus later). HW Erratas. + */ val = xive_regr(x, PC_TCTXT_TRACK); - val |= PC_TCTXT_TRACK_EN; + val &= ~PC_TCTXT_TRACK_EN; xive_regw(x, PC_TCTXT_TRACK, val); /* Enable relaxed ordering of trigger forwarding */
Due to some HW errata, the block tracking facility (performance optimisation for large systems) should be disabled on Nimbus chips. Disable it unconditionally for now. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> --- v2. Fix typo in comment