@@ -187,8 +187,7 @@ void init_chips(void)
dt_node_is_compatible(dt_root, "qemu,powernv9") ||
dt_node_is_compatible(dt_root, "qemu,powernv10") ||
dt_find_by_path(dt_root, "/qemu")) {
- proc_chip_quirks |= QUIRK_QEMU | QUIRK_NO_CHIPTOD
- | QUIRK_NO_DIRECT_CTL | QUIRK_NO_RNG;
+ proc_chip_quirks |= QUIRK_QEMU | QUIRK_NO_DIRECT_CTL | QUIRK_NO_RNG;
prlog(PR_NOTICE, "CHIP: Detected QEMU simulator\n");
}
@@ -1681,7 +1681,6 @@ error_out:
static int64_t opal_resync_timebase(void)
{
- /* Mambo and qemu doesn't simulate the chiptod */
if (chip_quirk(QUIRK_NO_CHIPTOD))
return OPAL_SUCCESS;
@@ -1829,13 +1828,16 @@ void chiptod_init(void)
bool sres;
int i;
- /* Mambo and qemu doesn't simulate the chiptod */
if (chip_quirk(QUIRK_NO_CHIPTOD))
return;
op_display(OP_LOG, OP_MOD_CHIPTOD, 0);
if (!chiptod_probe()) {
+ /* Not all QEMU models provide chiptod */
+ if (chip_quirk(QUIRK_QEMU))
+ return;
+
prerror("Failed ChipTOD detection !\n");
op_display(OP_FATAL, OP_MOD_CHIPTOD, 0);
abort();
@@ -1903,6 +1905,8 @@ void chiptod_init(void)
chiptod_init_topology_info();
op_display(OP_LOG, OP_MOD_CHIPTOD, 4);
+
+ prlog(PR_NOTICE, "Synchronized all processors to common timebase.\n");
}
/* CAPP timebase sync */
There is a QEMU model for ChipTOD (not yet upstream) that provides enough to get through skiboot's sync sequence. So run the chiptod init when running under QEMU, if it is being provided in the device tree. If not, don't crash because the QEMU patch has not been merged yet... Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- core/chip.c | 3 +-- hw/chiptod.c | 8 ++++++-- 2 files changed, 7 insertions(+), 4 deletions(-)