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Mon, 2 Jan 2023 03:15:29 +0000 (GMT) From: Athira Rajeev To: skiboot@lists.ozlabs.org, mpe@ellerman.id.au, maddy@linux.ibm.com Date: Mon, 2 Jan 2023 08:45:24 +0530 Message-Id: <20230102031524.73249-3-atrajeev@linux.vnet.ibm.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20230102031524.73249-1-atrajeev@linux.vnet.ibm.com> References: <20230102031524.73249-1-atrajeev@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: gNZ7Nm46Z4dDzPMGm2zRYPGJ9pPEq3Nf X-Proofpoint-GUID: gNZ7Nm46Z4dDzPMGm2zRYPGJ9pPEq3Nf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2023-01-01_11,2022-12-30_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 spamscore=0 phishscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 mlxscore=0 clxscore=1015 malwarescore=0 adultscore=0 mlxlogscore=974 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301020027 Subject: [Skiboot] [PATCH 3/3] skiboot: Update IMC PMU node names for power10 X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kjain@linux.ibm.com, disgoel@linux.ibm.com, linuxppc-dev@lists.ozlabs.org Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The nest IMC (In Memory Collection) Performance Monitoring Unit(PMU) node names are saved as "struct nest_pmus_struct" in the "hw/imc.c" IMC code. Not all the IMC PMUs listed in the device tree may be available. Nest IMC PMU names along with their bit values is represented in imc availability vector. This struct is used to remove the unavailable nodes by checking this vector. For power10, the imc_chip_avl_vector ie, imc availability vector ( which is a part of the IMC control block structure ), has change in mapping of units and bit positions. Hence rename the existing nest_pmus array to nest_pmus_p9 and add entry for power10 as nest_pmus_p10. Also the avl_vector has another change in bit positions 11:34. These bit positions tells the availability of Xlink/Alink/CAPI. There are total 8 links and three bit field combination says which link is available. Example, 101b means X-Link is configured. Patch implements all these change to handle nest_pmus_p10. Signed-off-by: Athira Rajeev --- hw/imc.c | 195 ++++++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 185 insertions(+), 10 deletions(-) diff --git a/hw/imc.c b/hw/imc.c index 779e9634..d1adc5ef 100644 --- a/hw/imc.c +++ b/hw/imc.c @@ -55,7 +55,7 @@ static unsigned int *htm_scom_index; * imc_chip_avl_vector(in struct imc_chip_cb, look at include/imc.h). * nest_pmus[] is an array containing all the possible nest IMC PMU node names. */ -static struct nest_pmus_struct nest_pmus[] = { +static struct nest_pmus_struct nest_pmus_p9[] = { { .name = "powerbus0@", .len = 10 }, { .name = "mcs0@", .len = 5}, { .name = "mcs1@", .len = 5}, @@ -110,6 +110,67 @@ static struct nest_pmus_struct nest_pmus[] = { /* reserved bits : 51 - 63 */ }; +static struct nest_pmus_struct nest_pmus_p10[] = { + { .name = "pb@", .len = 3 }, + { .name = "mcs0@", .len = 5}, + { .name = "mcs1@", .len = 5}, + { .name = "mcs2@", .len = 5}, + { .name = "mcs3@", .len = 5}, + { .name = "mcs4@", .len = 5}, + { .name = "mcs5@", .len = 5}, + { .name = "mcs6@", .len = 5}, + { .name = "mcs7@", .len = 5}, + { .name = "pec0@", .len = 5}, + { .name = "pec1@", .len = 5}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "NA", .len = 0}, + { .name = "phb0@", .len = 5}, + { .name = "phb1@", .len = 5}, + { .name = "phb2@", .len = 5}, + { .name = "phb3@", .len = 5}, + { .name = "phb4@", .len = 5}, + { .name = "phb5@", .len = 5}, + { .name = "ocmb0@", .len = 6}, + { .name = "ocmb1@", .len = 6}, + { .name = "ocmb2@", .len = 6}, + { .name = "ocmb3@", .len = 6}, + { .name = "ocmb4@", .len = 6}, + { .name = "ocmb5@", .len = 6}, + { .name = "ocmb6@", .len = 6}, + { .name = "ocmb7@", .len = 6}, + { .name = "ocmb8@", .len = 6}, + { .name = "ocmb9@", .len = 6}, + { .name = "ocmb10@", .len = 6}, + { .name = "ocmb11@", .len = 6}, + { .name = "ocmb12@", .len = 6}, + { .name = "ocmb13@", .len = 6}, + { .name = "ocmb14@", .len = 6}, + { .name = "ocmb15@", .len = 6}, + { .name = "nx@", .len = 3}, +}; + /* * Due to Nest HW/OCC restriction, microcode will not support individual unit * events for these nest units mcs0, mcs1 ... mcs7 in the accumulation mode. @@ -377,7 +438,7 @@ static void disable_unavailable_units(struct dt_node *dev) uint64_t avl_vec; struct imc_chip_cb *cb; struct dt_node *target; - int i; + int i, j; bool disable_all_nests = false; struct proc_chip *chip; @@ -415,14 +476,128 @@ static void disable_unavailable_units(struct dt_node *dev) avl_vec = (0xffULL) << 56; } - for (i = 0; i < ARRAY_SIZE(nest_pmus); i++) { - if (!(PPC_BITMASK(i, i) & avl_vec)) { - /* Check if the device node exists */ - target = dt_find_by_name_len(dev, nest_pmus[i].name, nest_pmus[i].len); - if (!target) - continue; - /* Remove the device node */ - dt_free(target); + if (proc_gen == proc_gen_p9) { + for (i = 0; i < ARRAY_SIZE(nest_pmus_p9); i++) { + if (!(PPC_BITMASK(i, i) & avl_vec)) { + /* Check if the device node exists */ + target = dt_find_by_name_len(dev, nest_pmus_p9[i].name, nest_pmus_p9[i].len); + if (!target) + continue; + /* Remove the device node */ + dt_free(target); + } + } + } else if (proc_gen == proc_gen_p10) { + int val; + char al[8], xl[8], otl[8], phb[8]; + for (i = 0; i < 11; i++) { + if (!(PPC_BITMASK(i, i) & avl_vec)) { + /* Check if the device node exists */ + target = dt_find_by_name_len(dev, nest_pmus_p10[i].name, nest_pmus_p10[i].len); + if (!target) + continue; + /* Remove the device node */ + dt_free(target); + } + } + + for (i = 35; i < 41; i++) { + if (!(PPC_BITMASK(i, i) & avl_vec)) { + /* Check if the device node exists for phb */ + for (j = 0; j < 3; j++) { + snprintf(phb, sizeof(phb), "phb%d_%d@", (i-35), j); + target = dt_find_by_name_len(dev, phb, 7); + if (!target) + continue; + /* Remove the device node */ + dt_free(target); + } + } + } + + for (i = 41; i < 58; i++) { + if (!(PPC_BITMASK(i, i) & avl_vec)) { + /* Check if the device node exists */ + target = dt_find_by_name_len(dev, nest_pmus_p10[i].name, nest_pmus_p10[i].len); + if (!target) + continue; + /* Remove the device node */ + dt_free(target); + } + } + + for (i=0; i<8; i++) { + val = ((avl_vec & (0x7ULL << (29 + (3 * i)))) >> (29 + (3 * i))); + switch (val) { + case 0x5: //xlink configured and functional + + snprintf(al, sizeof(al), "alink%1d@",(7-i)); + target = dt_find_by_name_len(dev, al, 7); + if (target) + dt_free(target); + + snprintf(otl, sizeof(otl),"otl%1d_0@",(7-i)); + target = dt_find_by_name_len(dev, otl, 7); + if (target) + dt_free(target); + + snprintf(otl,sizeof(otl),"otl%1d_1@",(7-i)); + target = dt_find_by_name_len(dev, otl, 7); + if (target) + dt_free(target); + + break; + case 0x6: //alink configured and functional + + snprintf(xl,sizeof(xl),"xlink%1d@",(7-i)); + target = dt_find_by_name_len(dev, xl, 7); + if (target) + dt_free(target); + + snprintf(otl,sizeof(otl),"otl%1d_0@",(7-i)); + target = dt_find_by_name_len(dev, otl, 7); + if (target) + dt_free(target); + + snprintf(otl,sizeof(otl),"otl%1d_1@",(7-i)); + target = dt_find_by_name_len(dev, otl, 7); + if (target) + dt_free(target); + break; + + case 0x7: //CAPI configured and functional + snprintf(al,sizeof(al),"alink%1d@",(7-i)); + target = dt_find_by_name_len(dev, al, 7); + if (target) + dt_free(target); + + snprintf(xl,sizeof(xl),"xlink%1d@",(7-i)); + target = dt_find_by_name_len(dev, xl, 7); + if (target) + dt_free(target); + break; + default: + snprintf(xl,sizeof(xl),"xlink%1d@",(7-i)); + target = dt_find_by_name_len(dev, xl, 7); + if (target) + dt_free(target); + + snprintf(al,sizeof(al),"alink%1d@",(7-i)); + target = dt_find_by_name_len(dev, al, 7); + if (target) + dt_free(target); + + snprintf(otl,sizeof(otl),"otl%1d_0@",(7-i)); + target = dt_find_by_name_len(dev, otl, 7); + if (target) + dt_free(target); + + snprintf(otl,sizeof(otl),"otl%1d_1@",(7-i)); + target = dt_find_by_name_len(dev, otl, 7); + if (target) + dt_free(target); + break; + } } }