From patchwork Fri Dec 17 02:36:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1569694 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=P7oxsVi0; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JFY710J6yz9t2p for ; Fri, 17 Dec 2021 13:37:48 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4JFY702fH7z3cDV for ; Fri, 17 Dec 2021 13:37:48 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=P7oxsVi0; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::435; helo=mail-pf1-x435.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=P7oxsVi0; dkim-atps=neutral Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4JFY6L5X4Jz3c53 for ; Fri, 17 Dec 2021 13:37:14 +1100 (AEDT) Received: by mail-pf1-x435.google.com with SMTP id x5so1025992pfr.0 for ; Thu, 16 Dec 2021 18:37:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ydw7DlhNHVwxMO232IMiw6KoQJf46qsSNKhAwz3l4qg=; b=P7oxsVi0uXLdvnCmlmwHkGTa+eFKCY8HGln5K7vtOwzt8JRfBexg0fVUd+ZM1xTudB DbWOovl+SIAeK5JSIzGFN+DOnJJgw6rwkUfcp4dS6A0gtLx5HPw9Uxy0bRB1QFA7Uq/1 pTDOjpbtVYnxabvkUrRZALQpAOowLXeXwbf6aCJSsNiNH+VcYn3z9o3YOJ9JUMsZHrj1 /7YnRBOCHw82ap1hCGiDQrTsGpc0kehtKQkenJObEyvpflN2cK/y2WxsqSVy6O+RGoX2 P1XIynYQqUvyIyHVJOdo63Rwh4A+xiQ4/vyL/TyGAENmdt5ccMLpbeQKklFLr6f85UGg 1a/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ydw7DlhNHVwxMO232IMiw6KoQJf46qsSNKhAwz3l4qg=; b=hIz88slCWiR4NGxy6xqGrh62R+j2HlTPQzNQ5Az3v5jSD7jt/SSTME407z8c/X0xrh AALO2ShFl7srdn3fFMD2w4btVIizBxAH/hzXo3rSX0Br71WBRIeIPNSR/jvLQiLYdKZ2 OYGx8NpEJfTv8y8qRsP84jE3MMyYb8JULZPpiC23H5g0UELt68OlPz+DSl5CiiGs+/uM 6ponPnOEuJqznTH/jHU2mUp5dVj05YYC6pTJ78LSR77QKC16l2dWj8m8YGy+YAJ+51oO mQlRz3L4kaa54sRPPh6tk3x6nfZ0aLd2612ppwEtRK1ZQRGEPiIlvAtsGSNmWRE7IiaD WWkw== X-Gm-Message-State: AOAM532FpSpB9GwHJukLreb0DUfrGN8kQ142nhdctEwQWdF1nHV3KaLJ RyDVcyiS2LrzQGrVdQn+Vt/+cl2sjuY= X-Google-Smtp-Source: ABdhPJxKkjJBn8MX6gBYqUaNkMydPprgZjldcwKtgX3QysDKp/vNPQqiHPWuo/Dqr3XHXPvwUwVFYA== X-Received: by 2002:a62:e508:0:b0:4a4:f06f:1cd9 with SMTP id n8-20020a62e508000000b004a4f06f1cd9mr818916pff.21.1639708632858; Thu, 16 Dec 2021 18:37:12 -0800 (PST) Received: from bobo.ozlabs.ibm.com (203-219-139-206.static.tpgi.com.au. [203.219.139.206]) by smtp.gmail.com with ESMTPSA id z13sm7835249pfj.160.2021.12.16.18.37.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 18:37:12 -0800 (PST) From: Nicholas Piggin To: skiboot@lists.ozlabs.org Date: Fri, 17 Dec 2021 12:36:44 +1000 Message-Id: <20211217023647.715283-7-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20211217023647.715283-1-npiggin@gmail.com> References: <20211217023647.715283-1-npiggin@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH v4 6/9] npu: move npu_set_fence_state() to phb_ops X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Stewart Smith This lets us consider not building in npu.o Reviewed-by: Dan Horák Signed-off-by: Stewart Smith --- core/hmi.c | 2 +- hw/npu.c | 7 +++++-- include/npu.h | 1 - include/pci.h | 3 +++ 4 files changed, 9 insertions(+), 4 deletions(-) diff --git a/core/hmi.c b/core/hmi.c index ce5abd7d6..fe3d82529 100644 --- a/core/hmi.c +++ b/core/hmi.c @@ -908,7 +908,7 @@ static void find_npu_checkstop_reason(int flat_chip_id, if (phb->phb_type == phb_type_pcie_v3) { /* Set the NPU to fenced since it can't recover. */ - npu_set_fence_state(phb_to_npu(phb), true); + phb->ops->set_fence_state(phb, true); } /* Set up the HMI event */ diff --git a/hw/npu.c b/hw/npu.c index 35e6372d2..542f37397 100644 --- a/hw/npu.c +++ b/hw/npu.c @@ -925,7 +925,9 @@ static int64_t npu_eeh_next_error(struct phb *phb, } /* For use in error injection and handling. */ -void npu_set_fence_state(struct npu *p, bool fence) { +static void npu_set_fence_state(struct phb *phb, bool fence) { + struct npu *p = phb_to_npu(phb); + p->fenced = fence; if (fence) @@ -968,7 +970,7 @@ static int64_t npu_err_inject(struct phb *phb, uint64_t pe_number, return OPAL_PARAMETER; } else if (type == 1) { /* Emulate fence mode. */ - npu_set_fence_state(p, true); + npu_set_fence_state(phb, true); } else { /* Cause a freeze with an invalid MMIO read. If the BAR is not * enabled, this will checkstop the machine. @@ -1012,6 +1014,7 @@ static const struct phb_ops npu_ops = { .get_diag_data2 = NULL, .set_capi_mode = NULL, .set_capp_recovery = NULL, + .set_fence_state = npu_set_fence_state, }; static void assign_mmio_bars(uint32_t gcid, uint32_t xscom, diff --git a/include/npu.h b/include/npu.h index 50cc9c9fc..45818a28f 100644 --- a/include/npu.h +++ b/include/npu.h @@ -153,7 +153,6 @@ int64_t npu_dev_procedure(void *dev, struct pci_cfg_reg_filter *pcrf, uint32_t offset, uint32_t len, uint32_t *data, bool write); -void npu_set_fence_state(struct npu *p, bool fence); void npu_dev_procedure_reset(struct npu_dev *dev); #define NPUDBG(p, fmt, a...) prlog(PR_DEBUG, "NPU%d: " fmt, \ diff --git a/include/pci.h b/include/pci.h index caae74431..101442490 100644 --- a/include/pci.h +++ b/include/pci.h @@ -340,6 +340,9 @@ struct phb_ops { /* Get/set PBCQ Tunnel BAR register */ void (*get_tunnel_bar)(struct phb *phb, uint64_t *addr); int64_t (*set_tunnel_bar)(struct phb *phb, uint64_t addr); + + /* Currently only used by NPU HMI code */ + void (*set_fence_state)(struct phb *phb, bool fence); }; enum phb_type {