From patchwork Thu Apr 2 11:26:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1265531 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48tLQ61LKLz9sQt for ; Thu, 2 Apr 2020 22:27:26 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=syA4muOa; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48tLQ60q8czDrC8 for ; Thu, 2 Apr 2020 22:27:26 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::1042; helo=mail-pj1-x1042.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=syA4muOa; dkim-atps=neutral Received: from mail-pj1-x1042.google.com (mail-pj1-x1042.google.com [IPv6:2607:f8b0:4864:20::1042]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48tLPs2hxSzDr7W for ; Thu, 2 Apr 2020 22:27:12 +1100 (AEDT) Received: by mail-pj1-x1042.google.com with SMTP id np9so1415149pjb.4 for ; Thu, 02 Apr 2020 04:27:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=J+CesPy9ZyCYowW3mY7sqmEayV/mXBZ3rmULA99+gxs=; b=syA4muOaMEGwHE/AZK6bS80OyYdGHBlt8CVYG869tBNHiu0fGJxyuNk9yqz18VjZuK mg6j8G37wXICDq/b5gl/V1iwfBx08xCAl4yD5y172mCWQGDG35S28U3pT3AsjhH5bTM9 ptl4/yabPNKcxhkVr0A6uymMmD3ALS6vGXRM+zlEq5X325V7bzH/6KbwIDtxDhmmNVAK ZV/eWP083tZrf42gwDXVfewbGsanyfUY2xuEKT+bwF8zpbD+3326i2VpzPDz9fqLUFl0 i7/WODMe2YDV6N6jhZ93NQh2vJUFnacC9Pv8x6QG2FSAvL0flZWQ3oQSmZiJhObX7ppu 8beg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=J+CesPy9ZyCYowW3mY7sqmEayV/mXBZ3rmULA99+gxs=; b=FsthOy/ADyCcAQyZb/lUNHjZKZanM0mW3IWMNbV2L14q1dMnOz/ycYN8W1ckXXe/32 7/ASxI882a774T/oBF8sIqPXuXVADvXY1nU8wnqLjA81nuiFgiauHszRrLPviBrOON4N aDV8j5TKm53DVEKCMglTrkFSK5lIzhIp6L7VKX4MG5jEDd4k0K4L4SVYO9cWVUt1A5+R /LUBc6A6j0Um/65x+ECSTGYLss5XOOh/MjAw7GN6iRO0ThUmX8fKOqRdVuHeWBR2fuAu ES1lhfZQQ1YnZfHf/byGXrngNdGYF/gz/aTLjXx8vn9+WnPztfLb0a7yGE4piWaqpfkh fLEQ== X-Gm-Message-State: AGi0PuaPW4FXcqyzEZRoMXql8Bp5QaouoRSp/3W8t5erbnlYDSyeZ1re fMUYxOXI9GBegzs3xzkzHHltDUbwvUs= X-Google-Smtp-Source: APiQypK6MNzOONu52SOzhA4VXglSQYGOV7yg1fj0niIQ/xeOusl75xvyG4KxSvomJnMqog/LyaDCNg== X-Received: by 2002:a17:902:b087:: with SMTP id p7mr2393919plr.13.1585826830267; Thu, 02 Apr 2020 04:27:10 -0700 (PDT) Received: from 192-168-1-12.tpgi.com.au ([193.119.57.62]) by smtp.gmail.com with ESMTPSA id a13sm3570374pjh.7.2020.04.02.04.27.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Apr 2020 04:27:09 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 2 Apr 2020 22:26:45 +1100 Message-Id: <20200402112645.2264-1-oohall@gmail.com> X-Mailer: git-send-email 2.21.1 MIME-Version: 1.0 Subject: [Skiboot] [RFC PATCH] hw/phb4: Add fake scom to allow reading PHB registers / IODA tables X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The motivation for this is largely so that I can have some way to extracting PHB state in a post-secureboot world. Currently the way this is done is by wacking the PHB registers directly using /dev/mem, but that's pretty jank to begin with and with lockdown we can't do that anyway. What I figured we need is an architected way to access a register space so this patch abuses to XSCOM API to do that. Each of the IODA tables (and the PHB's HV regs) has a dedicated XSCOM "part id" which can be used to access those registers from the host. Having a seperate address space for the IODA tables is necessary since access them needs to be done indirectly via the IODA_ADDR and IODA_DATA registers. This setup works well enough for the non-config PHB registers and the IODA tables since (like SCOMs) each register is 8 bytes. The cracks start showing when you consider the root port config registers (part of the HV register set) which only support four byte accesses. Moving the config regs to a sepeate part ID would fix that, but eh. The alternative would be something like adding a more generic set of READ_REG / WRITE_REG OPAL calls which could handle things like varying register access sizes, etc. Comments welcome. Not-Signed-off-by: Oliver O'Halloran --- hw/phb4.c | 102 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/hw/phb4.c b/hw/phb4.c index 60e797cf6e61..733593d40632 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -1999,6 +1999,105 @@ static void __unused phb4_dump_peltv(struct phb4 *p) } } +static struct ioda_table { + int index; + const char *name; +} ioda_table_list[] = { + { IODA3_TBL_LIST, "list", }, + { IODA3_TBL_MIST, "mist", }, + { IODA3_TBL_RCAM, "rcam", }, + { IODA3_TBL_MRT, "mrt", }, + { IODA3_TBL_PESTA, "pesta", }, + { IODA3_TBL_PESTB, "pestb", }, + { IODA3_TBL_TVT, "tvt", }, + { IODA3_TBL_TCAM, "tcam", }, + { IODA3_TBL_TDR, "tdr", }, + { IODA3_TBL_MBT, "mbt", }, + { IODA3_TBL_MDT, "mdt", }, + { IODA3_TBL_PEEV, "peev", }, +}; + +static int64_t phb4_fake_scom_write(struct scom_controller *scom, + uint32_t chipid, uint64_t pcbaddr, + uint64_t val) +{ + (void) val; + (void) chipid; + (void) pcbaddr; + (void) scom; + + return 0; +} + +static int64_t phb4_fake_scom_read(struct scom_controller *scom, + uint32_t chipid, uint64_t pcbaddr, + uint64_t *val) +{ + struct phb4 *p = scom->private; + + phb_lock(&p->phb); + + if (chipid == p->chip_id) { + // FIXME: broken for the RC config space regs + *val = phb4_read_reg(p, pcbaddr); + } else { + /* otherwise it's an IODA reg, so go read that */ + phb4_ioda_sel(p, chipid & 0x1f, pcbaddr, false); + *val = phb4_read_reg(p, PHB_IODA_DATA0); + } + + phb_unlock(&p->phb); + return OPAL_SUCCESS; +} + +static void phb4_register_fake_scom(struct phb4 *p) +{ + struct scom_controller *scom = zalloc(sizeof(*scom)); + struct dt_node *regs, *n; + uint32_t chip_id; + int i; + + if (!scom) + return; + + chip_id = (0x2 << 28) | (p->phb.opal_id << 8); + + /* + * FIXME: We probably want to have seperate "chip ids" for each + * ioda table so we can give each register range a sensible + * name. + */ + + regs = dt_new(p->phb.dt_node, "regs"); + dt_add_property(regs, "scom-controller", NULL, 0); + dt_add_property_cells(regs, "ibm,chip-id", chip_id); + + for (i = 0; i < ARRAY_SIZE(ioda_table_list); i++) { + int index = ioda_table_list[i].index; + struct scom_controller *scom; + + scom = zalloc(sizeof(*scom)); + if (!scom) + continue; + + scom->private = p; + scom->part_id = chip_id | index; + scom->read = phb4_fake_scom_read; + scom->write = phb4_fake_scom_write; + + if (scom_register(scom)) { + PHBERR(p, "Unable to add SCOM for IODA table %s\n", + ioda_table_list[i].name); + free(scom); + continue; + } + + n = dt_new_addr(regs, ioda_table_list[i].name, index); + dt_add_property_cells(n, "ibm,chip-id", chip_id | index); + dt_add_property(n, "scom-controller", NULL, 0); + } +} + static void __unused phb4_dump_ioda_table(struct phb4 *p, int table) { const char *name; @@ -5814,6 +5913,9 @@ static void phb4_create(struct dt_node *np) dt_add_property_string(np, "status", "okay"); + if (nvram_query_eq_dangerous("ioda-scoms", "yes")) + phb4_register_fake_scom(p); + return; failed: