From patchwork Thu Apr 2 11:13:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1265527 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48tL7841R3z9sQt for ; Thu, 2 Apr 2020 22:14:28 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=qpRilrdg; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48tL782TxFzDrPM for ; Thu, 2 Apr 2020 22:14:28 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::1042; helo=mail-pj1-x1042.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=qpRilrdg; dkim-atps=neutral Received: from mail-pj1-x1042.google.com (mail-pj1-x1042.google.com [IPv6:2607:f8b0:4864:20::1042]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48tL6w69X6zDrPD for ; Thu, 2 Apr 2020 22:14:14 +1100 (AEDT) Received: by mail-pj1-x1042.google.com with SMTP id nu11so1391208pjb.1 for ; Thu, 02 Apr 2020 04:14:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Vlenr941F8eCWtZjVKSnCr7BlTyq67b4J0rb9OA4NMc=; b=qpRilrdgUIIGH2i7OM79/fl+ncs7ToQzn/vSLnl2ZIRBjjjvPKy7IQFLpJ7aLg5VCT GQ8cvrH9ExYPZQ+Aq4lPpDuUPfi9YajwXA8ElNr3aQh4PGM2rnUHqPtwYBLj78xMhUo1 yKF/NvkYvH/62drXmvZYdNGMrybmWWcc16X81kdiSEObK6O9/2+Eb3ZpYcvXr3Jdm0L0 4w/Cu6WZ0NmAFiryfiDvVBpggNkNFcYdVHTqx9vRjc0a9kGlLd6MnIfsiklV77js+hUc PI3RCFONbURO7FH6wsQI1utqgCuFF+2l+Gz8H1qHTdNAt5jdkWDnDBnAL0JKQj9mKo1Z /PiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Vlenr941F8eCWtZjVKSnCr7BlTyq67b4J0rb9OA4NMc=; b=hkg2pOQ+hpbzbGbxotZApfdS88XGp+0PNYkSZqA2qyPj2eYrrJKX0rna+UBEjiIS08 KDO66Lv0uYwwvHQVsfxDXTzKALB8usBdsn2Wb54gRi+E/0vRv4lfTsn7CUrWnypE1geK d1V48yvQ7fUYR6VHa7f5G5B0jiu6fVCj5llV7K0VFyt41+Y0HRhlQR7VVq5uQDyN44Lq tdytSNjjTkB07jbnJgvl4osH8xATkbw88qRxrNZbV0wcWDiVEOvwwG2JSGuAn/ohTi5a PMdvPMVeKoBbagUdDBqN3KOqkDT4shBSBjtwp6Mp896ORQIeuPwjh0K/9nuYmLIaA6DP kBYQ== X-Gm-Message-State: AGi0PuZM6RdwB3Dhn6bI2AdSb4vJeZbpS/QOae4ILlg0gUIfSdWTKm+8 9j9cncCvkLkF/jwIELSWXwkBjfesQFM= X-Google-Smtp-Source: APiQypKHFs5Sv8tlOJBd/pdp0sG8FtVOnCJmw1Q3mSECDLQl1vk/LYMVDGQwt449jwK97d8YA4dphg== X-Received: by 2002:a17:90a:1784:: with SMTP id q4mr3064766pja.174.1585826050770; Thu, 02 Apr 2020 04:14:10 -0700 (PDT) Received: from 192-168-1-12.tpgi.com.au ([193.119.57.62]) by smtp.gmail.com with ESMTPSA id x70sm3239688pgd.37.2020.04.02.04.14.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Apr 2020 04:14:10 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 2 Apr 2020 22:13:54 +1100 Message-Id: <20200402111356.1413-2-oohall@gmail.com> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200402111356.1413-1-oohall@gmail.com> References: <20200402111356.1413-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 2/4] hw/centaur: Convert to use the new scom API X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Currently we assume any xscom_read / write targeted at a chipid with 0x8 as the top four bits is intended to be a centaur SCOM. On non-P8 platforms there is no reason to assume this so covert it to use the new struct scom_controller infrastructure. Signed-off-by: Oliver O'Halloran --- hw/centaur.c | 18 ++++++++++++++---- hw/xscom.c | 4 ---- include/centaur.h | 4 ++-- 3 files changed, 16 insertions(+), 10 deletions(-) diff --git a/hw/centaur.c b/hw/centaur.c index c79dd7f279d5..e9ff4197f705 100644 --- a/hw/centaur.c +++ b/hw/centaur.c @@ -307,9 +307,11 @@ static int centaur_xscom_ind_write(struct centaur_chip *centaur, return rc; } -int64_t centaur_xscom_read(uint32_t id, uint64_t pcb_addr, uint64_t *val) +static int64_t centaur_xscom_read(struct scom_controller *scom, + uint32_t id __unused, uint64_t pcb_addr, + uint64_t *val) { - struct centaur_chip *centaur = get_centaur(id); + struct centaur_chip *centaur = scom->private; int64_t rc; if (!centaur) @@ -349,9 +351,11 @@ int64_t centaur_xscom_read(uint32_t id, uint64_t pcb_addr, uint64_t *val) return rc; } -int64_t centaur_xscom_write(uint32_t id, uint64_t pcb_addr, uint64_t val) +static int64_t centaur_xscom_write(struct scom_controller *scom, + uint32_t id __unused, uint64_t pcb_addr, + uint64_t val) { - struct centaur_chip *centaur = get_centaur(id); + struct centaur_chip *centaur = scom->private; int64_t rc; if (!centaur) @@ -463,6 +467,12 @@ static bool centaur_add(uint32_t part_id, uint32_t mchip, uint32_t meng, if (!centaur_check_id(centaur)) return false; + centaur->scom.part_id = part_id; + centaur->scom.private = centaur; + centaur->scom.read = centaur_xscom_read; + centaur->scom.write = centaur_xscom_write; + scom_register(¢aur->scom); + cent_log(PR_INFO, centaur, "Found DD%x.%x chip\n", centaur->ec_level >> 4, centaur->ec_level & 0xf); diff --git a/hw/xscom.c b/hw/xscom.c index 32c813e572a6..0eda567fccf3 100644 --- a/hw/xscom.c +++ b/hw/xscom.c @@ -667,8 +667,6 @@ int _xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val, bool take_loc case 0: /* Normal processor chip */ gcid = partid; break; - case 8: /* Centaur */ - return centaur_xscom_read(partid, pcb_addr, val); case 4: /* EX chiplet */ gcid = xscom_decode_chiplet(partid, &pcb_addr); if (pcb_addr == 0) @@ -730,8 +728,6 @@ int _xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val, bool take_loc case 0: /* Normal processor chip */ gcid = partid; break; - case 8: /* Centaur */ - return centaur_xscom_write(partid, pcb_addr, val); case 4: /* EX chiplet */ gcid = xscom_decode_chiplet(partid, &pcb_addr); break; diff --git a/include/centaur.h b/include/centaur.h index 9089705e56f1..9845946bbeb9 100644 --- a/include/centaur.h +++ b/include/centaur.h @@ -22,6 +22,8 @@ struct centaur_chip { uint32_t error_count; struct lock lock; + struct scom_controller scom; + /* Used by hw/p8-i2c.c */ struct list_head i2cms; }; @@ -29,8 +31,6 @@ struct centaur_chip { extern int64_t centaur_disable_sensor_cache(uint32_t part_id); extern int64_t centaur_enable_sensor_cache(uint32_t part_id); -extern int64_t centaur_xscom_read(uint32_t id, uint64_t pcb_addr, uint64_t *val) __warn_unused_result; -extern int64_t centaur_xscom_write(uint32_t id, uint64_t pcb_addr, uint64_t val) __warn_unused_result; extern void centaur_init(void); extern struct centaur_chip *get_centaur(uint32_t part_id);