Message ID | 20190324172543.12625-3-svaidy@linux.vnet.ibm.com |
---|---|
State | Changes Requested |
Headers | show |
Series | Initial fused-core support for POWER9 | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/apply_patch | success | Successfully applied on branch master (b392d785eb49630b9f00fef8d17944ed82b2c1fe) |
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot | success | Test snowpatch/job/snowpatch-skiboot on branch master |
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco | success | Signed-off-by present |
diff --git a/hw/xive.c b/hw/xive.c index c9f3f07d..4444b649 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -1733,6 +1733,10 @@ static bool xive_config_init(struct xive *x) val |= PC_TCTXT_CFG_LGS_EN; /* Disable pressure relief as we hijack the field in the VPs */ val &= ~PC_TCTXT_CFG_STORE_ACK; + if (this_cpu()->is_fused_core) + val |= PC_TCTXT_CFG_FUSE_CORE_EN; + else + val &= ~PC_TCTXT_CFG_FUSE_CORE_EN; xive_regw(x, PC_TCTXT_CFG, val); xive_dbg(x, "PC_TCTXT_CFG=%016llx\n", val); diff --git a/include/xive.h b/include/xive.h index acc696a4..f4365efc 100644 --- a/include/xive.h +++ b/include/xive.h @@ -86,6 +86,7 @@ #define PC_TCTXT_CFG_TARGET_EN PPC_BIT(1) #define PC_TCTXT_CFG_LGS_EN PPC_BIT(2) #define PC_TCTXT_CFG_STORE_ACK PPC_BIT(3) +#define PC_TCTXT_CFG_FUSE_CORE_EN PPC_BIT(4) #define PC_TCTXT_CFG_HARD_CHIPID_BLK PPC_BIT(8) #define PC_TCTXT_CHIPID_OVERRIDE PPC_BIT(9) #define PC_TCTXT_CHIPID PPC_BITMASK(12,15)