From patchwork Fri Mar 1 14:30:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Miroshnichenko X-Patchwork-Id: 1050959 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44CKcw3VRFz9s70 for ; Mon, 4 Mar 2019 10:49:20 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=yadro.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="HfoOFKMD"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 44CKcw2JZfzDqK3 for ; Mon, 4 Mar 2019 10:49:20 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=yadro.com (client-ip=89.207.88.251; helo=mta-01.yadro.com; envelope-from=s.miroshnichenko@yadro.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=yadro.com Authentication-Results: lists.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=yadro.com header.i=@yadro.com header.b="HfoOFKMD"; dkim-atps=neutral Received: from mta-01.yadro.com (mta-01.yadro.com [89.207.88.251]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 449sKV1MWLzDqQJ for ; Sat, 2 Mar 2019 01:30:54 +1100 (AEDT) Received: from localhost (unknown [127.0.0.1]) by mta-01.yadro.com (Postfix) with ESMTP id 559F141978; Fri, 1 Mar 2019 14:30:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=yadro.com; h= content-type:content-type:content-transfer-encoding:mime-version :references:in-reply-to:x-mailer:message-id:date:date:subject :subject:from:from:received:received:received; s=mta-01; t= 1551450650; x=1553265051; bh=YceAdC5lPMDMTgA0bIeaRxWDuDbwrEx/smL ur+yTykI=; b=HfoOFKMDE3aP1T4UBN9pl3HgXguZB0C84G+z66hQ2BHfGR4Vb5R wAYfKy9ZiUkT4H+LDvI0flrPtOGZi5XXGhUinaSsM2ODIqCNSSZrK0SrGH+9EowA SAJmVaGg2Btb7anF/TkJ21jRCQBqQoScqXJCDA2l3gktrojdCMhgQ7XA= X-Virus-Scanned: amavisd-new at yadro.com Received: from mta-01.yadro.com ([127.0.0.1]) by localhost (mta-01.yadro.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id D1_sTYMs9m4N; Fri, 1 Mar 2019 17:30:50 +0300 (MSK) Received: from T-EXCH-02.corp.yadro.com (t-exch-02.corp.yadro.com [172.17.10.102]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mta-01.yadro.com (Postfix) with ESMTPS id 64D7441980; Fri, 1 Mar 2019 17:30:48 +0300 (MSK) Received: from NB-148.yadro.com (172.17.15.60) by T-EXCH-02.corp.yadro.com (172.17.10.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.32; Fri, 1 Mar 2019 17:30:47 +0300 From: Sergey Miroshnichenko To: Date: Fri, 1 Mar 2019 17:30:36 +0300 Message-ID: <20190301143038.23325-5-s.miroshnichenko@yadro.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190301143038.23325-1-s.miroshnichenko@yadro.com> References: <20190301143038.23325-1-s.miroshnichenko@yadro.com> MIME-Version: 1.0 X-Originating-IP: [172.17.15.60] X-ClientProxiedBy: T-EXCH-01.corp.yadro.com (172.17.10.101) To T-EXCH-02.corp.yadro.com (172.17.10.102) X-Mailman-Approved-At: Mon, 04 Mar 2019 10:48:37 +1100 Subject: [Skiboot] [PATCH RFC 4/6] pci-iov: Fix device allocation for VFs X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stewart Smith , Gavin Shan , linux@yadro.com Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Cfg filters are invoked before performing the I/O, so pci_iov_change() was reading an old value of the SRIOV_CTRL_VFE register - before it is updated. This patch makes use of the data which is being written to SRIOV_CTRL_VFE. Signed-off-by: Sergey Miroshnichenko --- core/pci-iov.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/core/pci-iov.c b/core/pci-iov.c index 8fecebc1..3bbb7b86 100644 --- a/core/pci-iov.c +++ b/core/pci-iov.c @@ -79,15 +79,13 @@ static void pci_iov_vf_quirk(struct phb *phb, struct pci_device *vf) * Update the SRIOV parameters that change when the number of * VFs is configured. */ -static bool pci_iov_update_parameters(struct pci_iov *iov) +static bool pci_iov_update_parameters(struct pci_iov *iov, uint16_t val) { struct phb *phb = iov->phb; uint16_t bdfn = iov->pd->bdfn; uint32_t pos = iov->pos; - uint16_t val; bool enabled; - pci_cfg_read16(phb, bdfn, pos + PCIECAP_SRIOV_CTRL, &val); enabled = !!(val & PCIECAP_SRIOV_CTRL_VFE); if (iov->enabled == enabled) return false; @@ -115,8 +113,8 @@ static bool pci_iov_update_parameters(struct pci_iov *iov) static int64_t pci_iov_change(void *dev __unused, struct pci_cfg_reg_filter *pcrf, uint32_t offset __unused, - uint32_t len __unused, - uint32_t *data __unused, + uint32_t len, + uint32_t *data, bool write __unused) { struct pci_iov *iov = (struct pci_iov *)pcrf->data; @@ -127,7 +125,9 @@ static int64_t pci_iov_change(void *dev __unused, bool changed; /* Update SRIOV variable parameters */ - changed = pci_iov_update_parameters(iov); + changed = pci_iov_update_parameters(iov, + (len == 2) ? (*data >> 16) : *data); + if (!changed) return OPAL_PARTIAL; @@ -202,6 +202,7 @@ void pci_init_iov_cap(struct phb *phb, struct pci_device *pd) struct pci_iov *iov; struct pci_cfg_reg_filter *pcrf; uint32_t i; + uint16_t val; /* Search for SRIOV capability */ if (!pci_has_cap(pd, PCI_CFG_CAP_ID_EXP, false)) @@ -260,6 +261,7 @@ void pci_init_iov_cap(struct phb *phb, struct pci_device *pd) iov->pd = pd; iov->pos = pos; iov->enabled = false; - pci_iov_update_parameters(iov); + pci_cfg_read16(phb, pd->bdfn, pos + PCIECAP_SRIOV_CTRL, &val); + pci_iov_update_parameters(iov, val); pci_set_cap(pd, PCIECAP_ID_SRIOV, pos, iov, pci_free_iov_cap, true); }