From patchwork Wed Feb 14 04:41:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell Currey X-Patchwork-Id: 873244 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zh6FZ4VDHz9t1t for ; Wed, 14 Feb 2018 15:42:10 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="WhR/6QTt"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3zh6FZ31JWzF1G5 for ; Wed, 14 Feb 2018 15:42:10 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="WhR/6QTt"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=russell.cc (client-ip=66.111.4.29; helo=out5-smtp.messagingengine.com; envelope-from=ruscur@russell.cc; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="WhR/6QTt"; dkim-atps=neutral Received: from out5-smtp.messagingengine.com (out5-smtp.messagingengine.com [66.111.4.29]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3zh6FS4RzTzF1Fx for ; Wed, 14 Feb 2018 15:41:55 +1100 (AEDT) Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id 6A4D021053; Tue, 13 Feb 2018 23:41:53 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute6.internal (MEProxy); Tue, 13 Feb 2018 23:41:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:message-id:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; bh=U4IKJb4PX9+V9VAv8 Olzp8R3gqH6y4JHRJHunUKjsVM=; b=WhR/6QTts0pXWoayIerg5Nk5rMNR+0ktz wiWlD/zlFWlT+O+VQJDlIshz41N3SzfvIXcWv8I7+Omws7bsC/Xj5+xfhTfMY2y1 l/ni8oeAwzFyuqN7WEmXR0fYd886+JHDwYHnrOv9GRSaa/eqW6sb4xpFc96p/tGs CpZOgq9IDgvCG2dy8wqnfus2FpV4VKzzs0uZ27ECfEZizUVQlGe5AXiexY7tuVln YCOltp4ryzJglOe2e5IhfndiAohfgA0m5+ECQkvB8L/fiY2/FzBFn27mXxi6E4yH DE7BhEtQtHYyfYgm1MeTiIAWad/BbKOHy79B4rxWYb7ZyiEcFGcXg== X-ME-Sender: Received: from snap.ozlabs.ibm.com (unknown [122.99.82.10]) by mail.messagingengine.com (Postfix) with ESMTPA id D69AC240B6; Tue, 13 Feb 2018 23:41:51 -0500 (EST) From: Russell Currey To: skiboot@lists.ozlabs.org, cyrilbur@gmail.com Date: Wed, 14 Feb 2018 15:41:38 +1100 Message-Id: <20180214044138.15477-1-ruscur@russell.cc> X-Mailer: git-send-email 2.14.1 Subject: [Skiboot] [PATCH] phb4: Only escalate freezes on MMIO load where necessary X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mikey@neuling.org MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" In order to work around a hardware issue, MMIO load freezes were escalated to fences on every chip. Now that hardware no longer requires this, restrict escalation to the chips that actually need it. Signed-off-by: Russell Currey --- hw/phb4.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/hw/phb4.c b/hw/phb4.c index 93ed1e06..aa3247c8 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -3012,6 +3012,29 @@ static uint64_t phb4_get_pesta(struct phb4 *p, uint64_t pe_number) return pesta; } +/* Check if the chip requires escalating a freeze to fence on MMIO loads */ +static bool phb4_escalation_required(void) +{ + uint64_t pvr = mfspr(SPR_PVR); + + /* + * Escalation is required on the following chip versions: + * - Cumulus DD1.0 + * - Nimbus DD1, DD2.0, DD2.1 + */ + if (pvr & PVR_POWER9_CUMULUS) { + if (PVR_VERS_MAJ(pvr) == 1 && PVR_VERS_MIN(pvr) == 0) + return true; + } else { /* Nimbus */ + if (PVR_VERS_MAJ(pvr) == 1) + return true; + if (PVR_VERS_MAJ(pvr) == 2 && PVR_VERS_MIN(pvr) < 2) + return true; + } + + return false; +} + static bool phb4_freeze_escalate(uint64_t pesta) { if ((GETFIELD(IODA3_PESTA_TRANS_TYPE, pesta) == @@ -3067,7 +3090,7 @@ static int64_t phb4_eeh_freeze_status(struct phb *phb, uint64_t pe_number, /* Read the full PESTA */ pesta = phb4_get_pesta(p, pe_number); /* Check if we need to escalate to fence */ - if (phb4_freeze_escalate(pesta)) { + if (phb4_escalation_required() && phb4_freeze_escalate(pesta)) { PHBERR(p, "Escalating freeze to fence PESTA[%lli]=%016llx\n", pe_number, pesta); *severity = OPAL_EEH_SEV_PHB_FENCED;