From patchwork Mon Nov 20 06:32:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell Currey X-Patchwork-Id: 839452 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ygJmz3tXHz9ryv for ; Mon, 20 Nov 2017 17:32:51 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="iE9n4r/D"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3ygJmz2ZV4zDqkv for ; Mon, 20 Nov 2017 17:32:51 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="iE9n4r/D"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=russell.cc (client-ip=66.111.4.28; helo=out4-smtp.messagingengine.com; envelope-from=ruscur@russell.cc; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="iE9n4r/D"; dkim-atps=neutral Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3ygJmd4vBtzDrTd for ; Mon, 20 Nov 2017 17:32:33 +1100 (AEDT) Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id 0813A20BCC; Mon, 20 Nov 2017 01:32:31 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute6.internal (MEProxy); Mon, 20 Nov 2017 01:32:31 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=JlxyuhFiO2vcafIRdICzbYuo5wHL25/81tu1eMplxDA=; b=iE9n4r/D AjYHXyrZUXemQhZ15gKaZq3/QPr4pXoRzfqkPgPrGBOuRK5oCPqffsuCTWuTpLPS Ai32tesbSpVUCO/YbL/1puPfPzvYsb9QiWjGYEML/94Pb8JxFRY3Bb4Hk2Gt5zmJ 28YfmEO/jhBQDVdb5r6M1mk4/21cSALjkbJEGSXnXdWToikJcn3+SktdnDXBLDVm 995wm3fvUu686nH1kCtISWfTkqWBsylD7Smu7E5alUBUR4lCKbAOJo3tR8Lzghna P/rS8H7UJ8WUmRLW9KnTYAHGtAMu8XGUTCgbW4fPtGN2tu+Hwpv+S0Zw9TiocWR2 C+8JYV7lYnFUzQ== X-ME-Sender: Received: from snap.au.ibm.com (unknown [122.99.82.10]) by mail.messagingengine.com (Postfix) with ESMTPA id E7E6F2469F; Mon, 20 Nov 2017 01:32:29 -0500 (EST) From: Russell Currey To: skiboot@lists.ozlabs.org Date: Mon, 20 Nov 2017 17:32:13 +1100 Message-Id: <20171120063213.22892-2-ruscur@russell.cc> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171120063213.22892-1-ruscur@russell.cc> References: <20171120063213.22892-1-ruscur@russell.cc> Subject: [Skiboot] [PATCH 2/2] pci: Shared slot state synchronisation for hot reset X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" When a device is shared between two PHBs, it doesn't get reset properly unless both PHBs issue a hot reset at "the same time". Practically this means a hot reset needs to be issued on both sides, and neither should bring the link up until the reset on both has completed. Signed-off-by: Russell Currey --- core/pci-slot.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/core/pci-slot.c b/core/pci-slot.c index 8bddc147..f8922df5 100644 --- a/core/pci-slot.c +++ b/core/pci-slot.c @@ -78,6 +78,7 @@ static void pci_slot_prepare_link_change(struct pci_slot *slot, bool up) static int64_t pci_slot_run_sm(struct pci_slot *slot) { + struct pci_slot *peer = slot->peer_slot; uint64_t now = mftb(); int64_t ret; @@ -89,10 +90,23 @@ static int64_t pci_slot_run_sm(struct pci_slot *slot) slot->delay_tgt_tb = 0; switch (slot->state & PCI_SLOT_STATE_MASK) { case PCI_SLOT_STATE_LINK: + // If the peer slot hasn't finished its hreset, need to wait + if (peer && peer->state & PCI_SLOT_STATE_HRESET && + !pci_slot_has_flags(peer, PCI_SLOT_FLAG_BOOTUP)) + return slot->ops.hreset(peer); + ret = slot->ops.poll_link(slot); + if (peer && peer->state & PCI_SLOT_STATE_LINK && + !pci_slot_has_flags(peer, PCI_SLOT_FLAG_BOOTUP)) + ret = MAX(ret, slot->ops.poll_link(peer)); break; case PCI_SLOT_STATE_HRESET: ret = slot->ops.hreset(slot); + + // If the slot has a peer, it needs to hreset as well. + if (peer && peer->state == PCI_SLOT_STATE_NORMAL && + !pci_slot_has_flags(peer, PCI_SLOT_FLAG_BOOTUP)) + slot->ops.hreset(peer); break; case PCI_SLOT_STATE_FRESET: ret = slot->ops.freset(slot);