From patchwork Sun Sep 10 07:33:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 812055 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xqjX71B7bz9sQl for ; Sun, 10 Sep 2017 17:35:35 +1000 (AEST) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3xqjX673y5zDrnc for ; Sun, 10 Sep 2017 17:35:34 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=permerror (mailfrom) smtp.mailfrom=kernel.crashing.org (client-ip=63.228.1.57; helo=gate.crashing.org; envelope-from=benh@kernel.crashing.org; receiver=) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3xqjVS19LnzDrcx for ; Sun, 10 Sep 2017 17:34:07 +1000 (AEST) Received: from pasglop.au.ibm.com (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id v8A7XVaj032370; Sun, 10 Sep 2017 02:33:36 -0500 From: Benjamin Herrenschmidt To: skiboot@lists.ozlabs.org Date: Sun, 10 Sep 2017 17:33:19 +1000 Message-Id: <20170910073330.25824-3-benh@kernel.crashing.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170910073330.25824-1-benh@kernel.crashing.org> References: <20170910073330.25824-1-benh@kernel.crashing.org> Subject: [Skiboot] [PATCH v2 03/14] xive: Ensure pressure relief interrupts are disabled X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" We don't use them and we hijack the VP field with their configuration to store the EQ reference, so make sure the kernel or guest can't turn them back on by doing MMIO writes to ACK# Signed-off-by: Benjamin Herrenschmidt --- hw/xive.c | 2 ++ include/xive.h | 1 + 2 files changed, 3 insertions(+) diff --git a/hw/xive.c b/hw/xive.c index 9148c5f6..d6628a09 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -1623,6 +1623,8 @@ static bool xive_config_init(struct xive *x) #endif val |= PC_TCTXT_CHIPID_OVERRIDE; val |= PC_TCTXT_CFG_TARGET_EN; + /* Disable pressure relief as we hijack the field in the VPs */ + val &= ~PC_TCTXT_CFG_STORE_ACK; val = SETFIELD(PC_TCTXT_CHIPID, val, x->block_id); xive_regw(x, PC_TCTXT_CFG, val); xive_dbg(x, "PC_TCTXT_CFG=%016llx\n", val); diff --git a/include/xive.h b/include/xive.h index 860373c9..70f6499f 100644 --- a/include/xive.h +++ b/include/xive.h @@ -75,6 +75,7 @@ #define PC_TCTXT_CFG 0x400 #define PC_TCTXT_CFG_BLKGRP_EN PPC_BIT(0) #define PC_TCTXT_CFG_TARGET_EN PPC_BIT(1) +#define PC_TCTXT_CFG_STORE_ACK PPC_BIT(3) #define PC_TCTXT_CFG_HARD_CHIPID_BLK PPC_BIT(8) #define PC_TCTXT_CHIPID_OVERRIDE PPC_BIT(9) #define PC_TCTXT_CHIPID PPC_BITMASK(12,15)