From patchwork Thu Aug 10 06:58:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell Currey X-Patchwork-Id: 800109 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xSfCk5cwLz9s7M for ; Thu, 10 Aug 2017 17:00:18 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="gPz1XBoK"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3xSfCk3MD6zDqwP for ; Thu, 10 Aug 2017 17:00:18 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="gPz1XBoK"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3xSfBX1DzQzDqrP for ; Thu, 10 Aug 2017 16:59:16 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="gPz1XBoK"; dkim-atps=neutral Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id 03ABF20CE1; Thu, 10 Aug 2017 02:59:14 -0400 (EDT) Received: from frontend2 ([10.202.2.161]) by compute6.internal (MEProxy); Thu, 10 Aug 2017 02:59:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc :x-sasl-enc; s=fm1; bh=ys7eE60a4WsQilu6PUOyxg0lC4r8yXL+MRS+G1jz3 os=; b=gPz1XBoKoPndtb8JBThTeG1OhoPZa9+J9Kz8a/4hilwP4rCNsFkNTturg /TYhJ4Aw8ByaYy6kgqBrgBybxLuTfqEhutbzZEJaL8OdF5JQdF20dvjsdEVqcsUg 8vS6Y4uaiTs24Vp775JIAiZddC9f8RDFnn8jl2UWVbGzWOhASi1ZXXQEuE0d8lib vJIkLHOgMZHZhFqEBEpp3X43qsR6y2bPmhhsVHOjHvAzBr8/RS8Jqps7BTERbpcU sxCaE4fwk0t9LfymvEAJR4xTOKj23BOjahXn3u1JIBvHGLmzQZoUP3AgqSRF7c2/ I023sptTeetWH9Yocs4yY3TBVV5/g== X-ME-Sender: X-Sasl-enc: +/ZzxcgX0XssElzbjvs6ZHNDnXERrt0cHkD1lXvz9R+S 1502348353 Received: from snap.ozlabs.ibm.com (unknown [122.99.82.10]) by mail.messagingengine.com (Postfix) with ESMTPA id 630A1246D5; Thu, 10 Aug 2017 02:59:12 -0400 (EDT) From: Russell Currey To: skiboot@lists.ozlabs.org Date: Thu, 10 Aug 2017 16:58:42 +1000 Message-Id: <20170810065843.13893-5-ruscur@russell.cc> X-Mailer: git-send-email 2.14.0 In-Reply-To: <20170810065843.13893-1-ruscur@russell.cc> References: <20170810065843.13893-1-ruscur@russell.cc> Subject: [Skiboot] [PATCH 5/6] phb4: Ignore slot state if performing complete reset X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mikey@neuling.org MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" If a PHB is being completely reset, its state is about to be blown away anyway, so if it's not in an appropriate state, creset it regardless. Signed-off-by: Russell Currey --- hw/phb4.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/phb4.c b/hw/phb4.c index b467e369..d13ab8c3 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -2700,8 +2700,11 @@ static int64_t phb4_creset(struct pci_slot *slot) pci_slot_set_state(slot, PHB4_SLOT_NORMAL); return slot->ops.freset(slot); default: - PHBERR(p, "CRESET: Unexpected slot state %08x\n", + PHBERR(p, "CRESET: Unexpected slot state %08x, resetting...\n", slot->state); + pci_slot_set_state(slot, PHB4_SLOT_NORMAL); + return slot->ops.creset(slot); + } error: