@@ -28,6 +28,15 @@
*/
#define ST_LOC_NPU_GROUP(group_id) (group_id << 3)
+/*
+ * For the .nvlink property we set the high bit to indicate that this slot
+ * has a paired NVLink. This is mainly so we can test for an nvlink by doing
+ * if (entry->nvlink)
+ */
+#define ST_LOC_NVLINK_VALID (1 << 31)
+#define ST_LOC_NPU_TARGET(chip_id, group_id) \
+ (ST_LOC_NVLINK_VALID | ((chip_id) << 16) | (group_id))
+
struct slot_table_entry {
enum slot_table_etype {
st_end, /* End of list */
@@ -39,6 +48,7 @@ struct slot_table_entry {
uint32_t location;
const char *name;
const struct slot_table_entry *children;
+ uint32_t nvlink; /* set by ST_LOC_NPU_GROUP */
};
extern const struct bmc_platform astbmc_ami;
@@ -48,6 +48,7 @@ static const struct slot_table_entry garrison_phb0_2_slot[] = {
.etype = st_pluggable_slot,
.location = ST_LOC_DEVFN(0,0),
.name = "GPU1",
+ .nvlink = ST_LOC_NPU_TARGET(0, 1),
},
{ .etype = st_end },
};
@@ -57,6 +58,7 @@ static const struct slot_table_entry garrison_phb0_3_slot[] = {
.etype = st_pluggable_slot,
.location = ST_LOC_DEVFN(0,0),
.name = "GPU2",
+ .nvlink = ST_LOC_NPU_TARGET(0, 0),
},
{ .etype = st_end },
};
@@ -127,6 +129,7 @@ static const struct slot_table_entry garrison_phb1_2_slot[] = {
.etype = st_pluggable_slot,
.location = ST_LOC_DEVFN(0,0),
.name = "GPU3",
+ .nvlink = ST_LOC_NPU_TARGET(1, 1),
},
{ .etype = st_end },
};
@@ -136,6 +139,7 @@ static const struct slot_table_entry garrison_phb1_3_slot[] = {
.etype = st_pluggable_slot,
.location = ST_LOC_DEVFN(0,0),
.name = "GPU4",
+ .nvlink = ST_LOC_NPU_TARGET(1, 0),
},
{ .etype = st_end },
};
@@ -90,6 +90,7 @@ static const struct slot_table_entry p8dnu_phb0_2_slot[] = {
.etype = st_pluggable_slot,
.location = ST_LOC_DEVFN(0,0),
.name = "GPU1",
+ .nvlink = ST_LOC_NPU_TARGET(0, 1),
},
{ .etype = st_end },
};
@@ -99,6 +100,7 @@ static const struct slot_table_entry p8dnu_phb0_3_slot[] = {
.etype = st_pluggable_slot,
.location = ST_LOC_DEVFN(0,0),
.name = "GPU2",
+ .nvlink = ST_LOC_NPU_TARGET(0, 0),
},
{ .etype = st_end },
};
@@ -169,6 +171,7 @@ static const struct slot_table_entry p8dnu_phb1_2_slot[] = {
.etype = st_pluggable_slot,
.location = ST_LOC_DEVFN(0,0),
.name = "GPU3",
+ .nvlink = ST_LOC_NPU_TARGET(1, 1),
},
{ .etype = st_end },
};
@@ -178,6 +181,7 @@ static const struct slot_table_entry p8dnu_phb1_3_slot[] = {
.etype = st_pluggable_slot,
.location = ST_LOC_DEVFN(0,0),
.name = "GPU4",
+ .nvlink = ST_LOC_NPU_TARGET(1, 0),
},
{ .etype = st_end },
};
@@ -35,16 +35,19 @@ static const struct slot_table_entry witherspoon_plx0_down[] = {
.etype = st_builtin_dev,
.location = ST_LOC_DEVFN(0xa,0),
.name = "GPU0",
+ .nvlink = ST_LOC_NPU_TARGET(0, 0),
},
{
.etype = st_builtin_dev,
.location = ST_LOC_DEVFN(0xb,0),
.name = "GPU1",
+ .nvlink = ST_LOC_NPU_TARGET(0, 1),
},
{
.etype = st_builtin_dev,
.location = ST_LOC_DEVFN(0xc,0),
.name = "GPU2",
+ .nvlink = ST_LOC_NPU_TARGET(0, 2),
},
{ .etype = st_end },
};
@@ -54,16 +57,19 @@ static const struct slot_table_entry witherspoon_plx1_down[] = {
.etype = st_builtin_dev,
.location = ST_LOC_DEVFN(0x4,0),
.name = "GPU3",
+ .nvlink = ST_LOC_NPU_TARGET(8, 0),
},
{
.etype = st_builtin_dev,
.location = ST_LOC_DEVFN(0x8,0),
.name = "GPU4",
+ .nvlink = ST_LOC_NPU_TARGET(8, 1),
},
{
.etype = st_builtin_dev,
.location = ST_LOC_DEVFN(0xd,0),
.name = "GPU5",
+ .nvlink = ST_LOC_NPU_TARGET(8, 2),
},
{ .etype = st_end },
};
Add per-slot information about which NVLink groups are paired to this slot. Note that we don't support NVLinks from multiple chips targeting a single devices to binding a device to a single NVLink group is reasonable. This patch is to prepare for removing the NPUs. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> --- platforms/astbmc/astbmc.h | 10 ++++++++++ platforms/astbmc/garrison.c | 4 ++++ platforms/astbmc/p8dnu.c | 4 ++++ platforms/astbmc/witherspoon.c | 6 ++++++ 4 files changed, 24 insertions(+)