From patchwork Tue May 16 09:03:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 762844 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wRs1m0HWhz9s85 for ; Tue, 16 May 2017 19:03:40 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WvIU7KaG"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3wRs1l6Cs2zDqb1 for ; Tue, 16 May 2017 19:03:39 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WvIU7KaG"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from mail-pg0-x242.google.com (mail-pg0-x242.google.com [IPv6:2607:f8b0:400e:c05::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3wRs1d4c0LzDqMc for ; Tue, 16 May 2017 19:03:33 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WvIU7KaG"; dkim-atps=neutral Received: by mail-pg0-x242.google.com with SMTP id u187so20630470pgb.1 for ; Tue, 16 May 2017 02:03:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=0bvm1Uc3TyOVKUpBAOtuD3xCefkDGQdgnoO95Dh1a50=; b=WvIU7KaGCMuwkcJe83nYSFkjJ5bBTpW17iXITQBwBflZDJMhNrU476eYl0rUyRlBaY 4mEiLV3FUxMiaZKdb/+Tmf/3k19MuPVO46A2fAm7RGdb+8Na51x74cqdXefiomQn547a c6dKlo8Ydx4GOI6FSq5TPgXZsM7qAwnXPv7jZp6fS5HAaVcuBTnzuTc2fqZta6xRd79j 2J3WLlCO1JYsZf5GRmzr9lJGfdE9XjewfEElTyVXceFvK2eIfBEeZRDYXClhjEHoSswP iVMsJC+QAFx/at3d2fCNXRJW5yRw7NKleWdQJQ4tQi6K7QY6jSCjwlSRO7D/lSSWaMIv tlig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=0bvm1Uc3TyOVKUpBAOtuD3xCefkDGQdgnoO95Dh1a50=; b=p4kzF79yq4t6hM2ySt7G5OBp+EgovNgVwUinw6aC7IyYe4yHSl9sOP3zM+gRuc1kiY ULuynYEv35parfgLSLBLiwF8jq/Ba4aFxYn/VIUCOwhmT7bdMNFEc3V2z/0Q5KYn1WIj ibyn3Tyvquv3Q6DXR/Q6A0mJat3hBa++kK6/ETpVjKSbQ9ib6z9pUYBSxYM6fx0TsQ8X Aqx+7gKeRXvM4WtKMn6Tro6dgh9RWWY+c3m28gL0wLllGys19ro4EH0MaYLsi2pRFf0i EwnU63R4SG3gddZ5qLuMvQFIHppLnY6DHImjOy4Vzi1cpkjyAmMZ7WE6YxDbL1z8do9P azEA== X-Gm-Message-State: AODbwcDgNvHufbUbPtnmTcU0f+REMjrA3ESWzy42MiFuE4Zn8e/CZ5/9 yBAB2LzvBNsbPQ== X-Received: by 10.84.232.204 with SMTP id x12mr14309182plm.77.1494925411958; Tue, 16 May 2017 02:03:31 -0700 (PDT) Received: from flat-canetoad.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id y20sm16407397pfb.93.2017.05.16.02.03.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 May 2017 02:03:31 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 16 May 2017 19:03:20 +1000 Message-Id: <20170516090321.22527-1-oohall@gmail.com> X-Mailer: git-send-email 2.9.3 Subject: [Skiboot] [PATCH 1/2] hw/phys_map: Use raw chip IDs X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Neuling MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" We need to be able to query the BAR mapping from the HDAT parser which is run prior the the proc_chip structures being initialised. Define a wrapper for the existing usages and provide a low-level function that allows the map the be queried with the global hardware chip ID itself. Cc: Michael Neuling Signed-off-by: Oliver O'Halloran --- hw/phys-map.c | 9 +++++---- include/phys-map.h | 11 ++++++++++- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/hw/phys-map.c b/hw/phys-map.c index 768f464f4682..65c440178283 100644 --- a/hw/phys-map.c +++ b/hw/phys-map.c @@ -134,10 +134,11 @@ static inline bool phys_map_entry_null(const struct phys_map_entry *e) return false; } + /* This crashes skiboot on error as any bad calls here are almost * certainly a developer error */ -void phys_map_get(struct proc_chip *chip, enum phys_map_type type, +void __phys_map_get(uint64_t gcid, enum phys_map_type type, int index, uint64_t *addr, uint64_t *size) { const struct phys_map_entry *e; uint64_t a; @@ -162,16 +163,16 @@ void phys_map_get(struct proc_chip *chip, enum phys_map_type type, break; } a = e->addr; - a += (uint64_t)chip->id << phys_map->chip_select_shift; + a += gcid << phys_map->chip_select_shift; if (addr) *addr = a; if (size) *size = e->size; - prlog(PR_TRACE, "Assigning BAR [%x] type:%02i index:%x " + prlog(PR_TRACE, "Assigning BAR [%"PRIx64"] type:%02i index:%x " "0x%016"PRIx64" for 0x%016"PRIx64"\n", - chip->id, type, index, a, e->size); + gcid, type, index, a, e->size); return; diff --git a/include/phys-map.h b/include/phys-map.h index a0124322a608..5738a5456900 100644 --- a/include/phys-map.h +++ b/include/phys-map.h @@ -53,9 +53,18 @@ enum phys_map_type { RESV }; -extern void phys_map_get(struct proc_chip *chip, enum phys_map_type type, +/* + * Use this to query the phys map before we've done per-cpu init. + */ +extern void __phys_map_get(uint64_t gcid, enum phys_map_type type, int index, uint64_t *addr, uint64_t *size); +static inline void phys_map_get(struct proc_chip *chip, enum phys_map_type type, + int index, uint64_t *addr, uint64_t *size) +{ + __phys_map_get(chip->id, type, index, addr, size); +} + extern void phys_map_init(void); #endif /* __PHYS_MAP_H */