From patchwork Thu Apr 20 00:55:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell Currey X-Patchwork-Id: 752571 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3w7gQm413Hz9s75 for ; Thu, 20 Apr 2017 10:55:44 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="MsXojdCp"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3w7gQm2pQJzDqGv for ; Thu, 20 Apr 2017 10:55:44 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="MsXojdCp"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from new1-smtp.messagingengine.com (new1-smtp.messagingengine.com [66.111.4.221]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3w7gQc6YMqzDq9d for ; Thu, 20 Apr 2017 10:55:36 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="MsXojdCp"; dkim-atps=neutral Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailnew.nyi.internal (Postfix) with ESMTP id A9463BE1; Wed, 19 Apr 2017 20:55:34 -0400 (EDT) Received: from frontend2 ([10.202.2.161]) by compute6.internal (MEProxy); Wed, 19 Apr 2017 20:55:34 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:message-id:subject:to :x-me-sender:x-me-sender:x-sasl-enc:x-sasl-enc; s=fm1; bh=YIoIhE RNoMldxhzZcU3QKOR20awPL25pyXsIQ1+aT7g=; b=MsXojdCp/A6cCTuLXCkTLe qQsYPYhNoLA9budw5k9+1yaWKcazYjIh+wNUH2vteWerda8l8xw67ECd3IfymXCX Go/nv16J3BT4fB5TrnlE7Ut8lYz354qZg1eXQiglhY1lLNcXaOf31z5cc9AnLyZR lbWXGEy9dlIPdRFz35k/2nVJKwes+Qaxij0rMQZowIBxEYlFEky18Mt3/8N2/P3j m+rQT2gR8xqj+GNheO+aym6+WQSopQVwaBZzg5J0Nwfs08b+HX4RuqCnjcEZjGKU f+EFa861TmsaNOvvoEOa6AIA1buJgbkDtNXOHyqG2pYWXWEixQ3CL9FTsTEamw4w == X-ME-Sender: X-Sasl-enc: /E7D5dJF1VtRySBUB6vBV+hzbiYk8U5jczzO5qJ+yVJd 1492649733 Received: from snap.ozlabs.ibm.com (unknown [122.99.82.10]) by mail.messagingengine.com (Postfix) with ESMTPA id A171F24373; Wed, 19 Apr 2017 20:55:32 -0400 (EDT) From: Russell Currey To: skiboot@lists.ozlabs.org Date: Thu, 20 Apr 2017 10:55:23 +1000 Message-Id: <20170420005523.15000-1-ruscur@russell.cc> X-Mailer: git-send-email 2.12.2 Subject: [Skiboot] [PATCH] phb4: Add an option for disabling EEH MMIO in nvram X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Having the option to disable EEH for MMIO without rebuilding skiboot could be useful for testing, so check for disable-eeh-mmio=true in nvram. Signed-off-by: Russell Currey Reviewed-by: Gavin Shan --- hw/phb4.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index e9c59c52..59fd6407 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -53,6 +53,7 @@ #include #include #include +#include /* Enable this to disable error interrupts for debug purposes */ #define DISABLE_ERR_INTS @@ -2841,9 +2842,13 @@ static void phb4_init_hw(struct phb4 *p, bool first_init) out_be64(p->regs + PHB_PCIE_CRESET, creset); /* Init_16 - PHB Control */ - out_be64(p->regs + PHB_CTRLR, - PHB_CTRLR_IRQ_PGSZ_64K | - SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_2_PER_PE)); + val = PHB_CTRLR_IRQ_PGSZ_64K | + SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_2_PER_PE); + + if (nvram_query_eq("disable-eeh-mmio", "true")) + val |= PHB_CTRLR_MMIO_EEH_DISABLE; + + out_be64(p->regs + PHB_CTRLR, val); /* Init_17..40 - Architected IODA3 inits */ phb4_init_ioda3(p);