From patchwork Thu Nov 10 07:34:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 693086 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tDw0y60ZZz9t1b for ; Thu, 10 Nov 2016 18:39:30 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3tDw0y5Fd5zDvj4 for ; Thu, 10 Nov 2016 18:39:30 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3tDw0C6117zDvhB for ; Thu, 10 Nov 2016 18:38:51 +1100 (AEDT) Received: from pasglop.au.ibm.com (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id uAA7YsZw030578; Thu, 10 Nov 2016 01:35:05 -0600 From: Benjamin Herrenschmidt To: skiboot@lists.ozlabs.org Date: Thu, 10 Nov 2016 18:34:41 +1100 Message-Id: <1478763292-23238-5-git-send-email-benh@kernel.crashing.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1478763292-23238-1-git-send-email-benh@kernel.crashing.org> References: <1478763292-23238-1-git-send-email-benh@kernel.crashing.org> Subject: [Skiboot] [PATCH 05/16] xive: Fix interrupt number mangling X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The comment and implementation didn't match, we were putting the block_id in the part of the field reserved for the CPPR. Signed-off-by: Benjamin Herrenschmidt --- hw/xive.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/xive.c b/hw/xive.c index dcd8d5b..3c25cae 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -349,9 +349,9 @@ struct xive { * reserved for the CPPR value. * */ -#define GIRQ_TO_BLK(__g) (((__g) >> 24) & 0xf) -#define GIRQ_TO_IDX(__g) ((__g) & 0x00ffffff) -#define BLKIDX_TO_GIRQ(__b,__i) (((uint32_t)(__b)) << 24 | (__i)) +#define GIRQ_TO_BLK(__g) (((__g) >> 20) & 0xf) +#define GIRQ_TO_IDX(__g) ((__g) & 0x000fffff) +#define BLKIDX_TO_GIRQ(__b,__i) (((uint32_t)(__b)) << 20 | (__i)) /* VP IDs are just the concatenation of the BLK and index as found * in an EQ target field for example