From patchwork Sun Jul 3 00:50:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 643663 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rhs5X3gWwz9s9n for ; Sun, 3 Jul 2016 10:50:56 +1000 (AEST) Received: from ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3rhs5X2hpmzDqp7 for ; Sun, 3 Jul 2016 10:50:56 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3rhs580BSRzDqnS for ; Sun, 3 Jul 2016 10:50:35 +1000 (AEST) Received: from pasglop.au.ibm.com (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id u630oM1k006724; Sat, 2 Jul 2016 19:50:30 -0500 From: Benjamin Herrenschmidt To: skiboot@lists.ozlabs.org Date: Sun, 3 Jul 2016 10:50:13 +1000 Message-Id: <1467507018-16982-3-git-send-email-benh@kernel.crashing.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1467507018-16982-1-git-send-email-benh@kernel.crashing.org> References: <1467507018-16982-1-git-send-email-benh@kernel.crashing.org> Subject: [Skiboot] [PATCH 3/8] psi: On p9, create an interrupt-map for routing PSI interrupts X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" This will provide the global IRQ numbers for all 16 PSI inputs (though we don't really care about 0 here). We can then express them in the device-tree as relative to the PSI bridge. Among others, that allows us to express the external interrupt and the LPC interrupt using a fixed numbering scheme. The example device-tree is updated to route them all to the LPC0 input which corresponds to what the LPC code does at the moment. Signed-off-by: Benjamin Herrenschmidt --- doc/device-tree/examples/power9-phb4.dts | 28 +++++++++++++++++++++++++++- hw/psi.c | 14 ++++++++++++++ 2 files changed, 41 insertions(+), 1 deletion(-) diff --git a/doc/device-tree/examples/power9-phb4.dts b/doc/device-tree/examples/power9-phb4.dts index ba5009f..906ea31 100644 --- a/doc/device-tree/examples/power9-phb4.dts +++ b/doc/device-tree/examples/power9-phb4.dts @@ -154,9 +154,18 @@ compatible = "ibm,power9-xive-x"; }; - psihb@5012900 { + PSI_X0 : psihb@5012900 { reg = <0x5012900 0x100>; compatible = "ibm,power9-psihb-x", "ibm,psihb-x"; + + /* This acts as an interrupt remapper for the 16 + * interrupts coming into the PSI HB. + * OPAL will generate the corresponding interrupt-map + * property with the final XIVE numbers + */ + #interrupt-cells = <1>; + #address-cells = <0>; + #interrupt-map-mask = < 0xff >; }; }; @@ -186,6 +195,23 @@ ranges = < 3 0 0xf0000000 0x10000000 /* FW space */ 0 0 0xe0000000 0x10000000 /* MEM space */ 1 0 0xd0010000 0x00010000 /* IO space */ >; + + /* We currently only support level interrupts on the LPC, + * we use 1 cell. + */ + #interrupt-cells = <1>; + + /* Route the LPC interrupts to one of the 4 supported + * PSI interrupt inputs [7...10]. + */ + interrupt-map = < 0 0 4 &PSI_X0 7 + 0 0 10 &PSI_X0 7>; + interrupt-map-mask = < 0 0 0xff >; + + /* + * Devices on the LPC bus go here + */ + serial@i3f8 { compatible = "ns16550"; reg = < 1 0x3f8 0x10 >; diff --git a/hw/psi.c b/hw/psi.c index 16f88c2..6d9c2ad 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -860,6 +860,19 @@ static void psi_activate_phb(struct psi *psi) #endif } +static void psi_create_p9_int_map(struct psi *psi, struct dt_node *np) +{ + uint32_t map[P9_PSI_NUM_IRQS][3]; + int i; + + for (i = 0; i < P9_PSI_NUM_IRQS; i++) { + map[i][0] = i; + map[i][1] = psi->interrupt + i; + map[i][0] = 1; + } + dt_add_property(np, "interrupt-map", map, sizeof(map)); +} + static void psi_create_mm_dtnode(struct psi *psi) { struct dt_node *np; @@ -883,6 +896,7 @@ static void psi_create_mm_dtnode(struct psi *psi) case proc_gen_p9: dt_add_property_strings(np, "compatible", "ibm,psi", "ibm,power9-psi"); + psi_create_p9_int_map(psi, np); break; default: dt_add_property_strings(np, "compatible", "ibm,psi");