From patchwork Fri Jun 24 22:47:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 640471 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rbtpT29KLz9sp7 for ; Sat, 25 Jun 2016 08:50:41 +1000 (AEST) Received: from ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3rbtpT06r5zDqmv for ; Sat, 25 Jun 2016 08:50:41 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3rbtmR1nXJzDqmF for ; Sat, 25 Jun 2016 08:48:54 +1000 (AEST) Received: from pasglop.au.ibm.com (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id u5OMm2Mr022384; Fri, 24 Jun 2016 17:48:50 -0500 From: Benjamin Herrenschmidt To: skiboot@lists.ozlabs.org Date: Sat, 25 Jun 2016 08:47:41 +1000 Message-Id: <1466808476-32690-18-git-send-email-benh@kernel.crashing.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1466808476-32690-1-git-send-email-benh@kernel.crashing.org> References: <1466808476-32690-1-git-send-email-benh@kernel.crashing.org> Subject: [Skiboot] [PATCH 18/33] power9: Add example device tree for phb4 X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Benjamin Herrenschmidt Acked-by: Michael Neuling --- doc/device-tree/examples/power9-phb4.dts | 157 +++++++++++++++++++++++++++++++ 1 file changed, 157 insertions(+) create mode 100644 doc/device-tree/examples/power9-phb4.dts diff --git a/doc/device-tree/examples/power9-phb4.dts b/doc/device-tree/examples/power9-phb4.dts new file mode 100644 index 0000000..ea7e403 --- /dev/null +++ b/doc/device-tree/examples/power9-phb4.dts @@ -0,0 +1,157 @@ +/dts-v1/; + +/ { + compatible = "ibm,powernv"; + model = "BML"; + #size-cells = <0x2>; + #address-cells = <0x2>; + + chosen { + linux,pci-assign-all-buses = <0x1>; + linux,pci-probe-only = <0x0>; + linux,platform = <0x100>; + ibm,architecture-vec-5 = <0x0 0x800000>; + linux,initrd-start = <0x0 0x28000000>; + linux,initrd-end = <0x0 0x30000000>; + bootargs = "powersave=off"; + }; + + memory@0 { + reg = <0x0 0x0 0x0 0x80000000>; + ibm,chip-id = <0x0>; + device_type = "memory"; + }; + + cpus { + #size-cells = <0x0>; + #address-cells = <0x1>; + + PowerPC,POWER9@0 { + device_type = "cpu"; + status = "okay"; + ibm,chip-id = <0x0>; + ibm,pir = <0x0>; + timebase-frequency = <0x1c4fecc0>; + clock-frequency = <0xe27f6600>; + ibm,segment-page-sizes = <0xc 0x0 0x1 0xc 0x0 0x10 0x110 0x1 0x10 0x1 0x14 0x111 0x1 0x14 0x2 0x18 0x100 0x1 0x18 0x0 0x22 0x120 0x1 0x22 0x3>; + ibm,processor-segment-sizes = <0x1c 0xffffffff 0xffffffff 0xffffffff>; + ibm,pa-features = <0x600f63f 0xc70080c0>; + i-cache-size = <0x8000>; + d-cache-size = <0x8000>; + i-cache-line-size = <0x80>; + d-cache-line-size = <0x80>; + ibm,slb-size = <0x20>; + ibm,vmx = <0x2>; + reg = <0x0>; +// ibm,ppc-interrupt-server#s = <0x0 0x01>; + ibm,ppc-interrupt-server#s = <0x0>; + }; + }; + + xscom@603fc00000000 { + compatible = "ibm,xscom", "ibm,power9-xscom"; + ibm,chip-id = <0x0>; + #size-cells = <0x1>; + #address-cells = <0x1>; + reg = <0x603fc 0x0 0x8 0x0>; + + + /* PE#0 supports only one stack */ + pbcq@4010c00 { + ibm,pec-index = <0x0>; + reg = <0x4010c00 0x100 0xd010800 0x200>; + compatible = "ibm,power9-pbcq"; + + /* child address is stack number */ + #address-cells = <1>; + #size-cells = <0>; + stack@0 { + /* Stack number */ + reg = <0>; + /* Chip-scope PHB index */ + ibm,phb-index = <0x0>; + compatible = "ibm,power9-phb-stack"; + /* ibm,lane-eq = < ????? >; */ + status = "okay"; + }; + }; + /* PE#1 supports two stacks */ + + pbcq@4011000 { + ibm,pec-index = <0x1>; + reg = <0x4011000 0x100 0xe010800 0x200>; + compatible = "ibm,power9-pbcq"; + + /* child address is stack number */ + #address-cells = <1>; + #size-cells = <0>; + stack@0 { + /* Stack number */ + reg = <0>; + /* Chip-scope PHB index */ + ibm,phb-index = <0x1>; + compatible = "ibm,power9-phb-stack"; + /* ibm,lane-eq = < ????? >; */ + status = "disabled"; + }; + stack@1 { + /* Stack number */ + reg = <1>; + /* Chip-scope PHB index */ + ibm,phb-index = <0x2>; + compatible = "ibm,power9-phb-stack"; + /* ibm,lane-eq = < ????? >; */ + status = "disabled"; + }; + }; + + /* PE#2 supports three stacks */ + pbcq@4011400 { + ibm,pec-index = <0x2>; + reg = <0x4011400 0x100 0xf010800 0x200>; + compatible = "ibm,power9-pbcq"; + + /* child address is stack number */ + #address-cells = <1>; + #size-cells = <0>; + stack@0 { + /* Stack number */ + reg = <0>; + /* Chip-scope PHB index */ + ibm,phb-index = <0x3>; + compatible = "ibm,power9-phb-stack"; + /* ibm,lane-eq = < ????? >; */ + status = "disabled"; + }; + stack@1 { + /* Stack number */ + reg = <1>; + /* Chip-scope PHB index */ + ibm,phb-index = <0x4>; + compatible = "ibm,power9-phb-stack"; + /* ibm,lane-eq = < ????? >; */ + status = "disabled"; + }; + stack@2 { + /* Stack number */ + reg = <2>; + /* Chip-scope PHB index */ + ibm,phb-index = <0x5>; + compatible = "ibm,power9-phb-stack"; + /* ibm,lane-eq = < ????? >; */ + status = "disabled"; + }; + }; + + chiptod@40000 { + primary; + reg = <0x40000 0x34>; + compatible = "ibm,power-chiptod", "ibm,power9-chiptod"; + }; + + xive@5013400 { + reg = <0x5013000 0x300>; + compatible = "ibm,power9-xive-x"; + }; + }; +};