From patchwork Mon Jun 20 08:28:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 637872 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rY3t44yGlz9sBm for ; Mon, 20 Jun 2016 18:29:00 +1000 (AEST) Received: from ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3rY3t44BZjzDqL4 for ; Mon, 20 Jun 2016 18:29:00 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3rY3sY5CfMzDq5d for ; Mon, 20 Jun 2016 18:28:33 +1000 (AEST) Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u5K8NroU098316 for ; Mon, 20 Jun 2016 04:28:31 -0400 Received: from e37.co.us.ibm.com (e37.co.us.ibm.com [32.97.110.158]) by mx0b-001b2d01.pphosted.com with ESMTP id 23mywvjgmw-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 20 Jun 2016 04:28:31 -0400 Received: from localhost by e37.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 20 Jun 2016 02:28:29 -0600 Received: from d03dlp01.boulder.ibm.com (9.17.202.177) by e37.co.us.ibm.com (192.168.1.137) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Mon, 20 Jun 2016 02:28:28 -0600 X-IBM-Helo: d03dlp01.boulder.ibm.com X-IBM-MailFrom: stewart@linux.vnet.ibm.com X-IBM-RcptTo: skiboot@lists.ozlabs.org Received: from b03cxnp08026.gho.boulder.ibm.com (b03cxnp08026.gho.boulder.ibm.com [9.17.130.18]) by d03dlp01.boulder.ibm.com (Postfix) with ESMTP id 7DEDB1FF004A for ; Mon, 20 Jun 2016 02:28:11 -0600 (MDT) Received: from b03ledav006.gho.boulder.ibm.com (b03ledav006.gho.boulder.ibm.com [9.17.130.237]) by b03cxnp08026.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u5K8SRZj39125118; Mon, 20 Jun 2016 01:28:27 -0700 Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 83435C603E; Mon, 20 Jun 2016 02:28:27 -0600 (MDT) Received: from birb.localdomain (unknown [9.83.5.130]) by b03ledav006.gho.boulder.ibm.com (Postfix) with SMTP id C1AE5C6037; Mon, 20 Jun 2016 02:28:26 -0600 (MDT) Received: from ka1.ozlabs.ibm.com (localhost.localdomain [127.0.0.1]) by birb.localdomain (Postfix) with ESMTP id B5B48229F46A; Mon, 20 Jun 2016 18:28:22 +1000 (AEST) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Mon, 20 Jun 2016 18:28:19 +1000 X-Mailer: git-send-email 2.1.4 In-Reply-To: <1466411300-10047-1-git-send-email-stewart@linux.vnet.ibm.com> References: <1466411300-10047-1-git-send-email-stewart@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16062008-0024-0000-0000-000013EDB7A5 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16062008-0025-0000-0000-000041F6BD17 Message-Id: <1466411300-10047-3-git-send-email-stewart@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-06-20_06:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1606200101 Subject: [Skiboot] [PATCH 3/4] fwts: Add FWTS annotations for NPU errors X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" We also remove the NPUERR macros so that the FWTS parsing magic can construct find the prlog statements. Signed-off-by: Stewart Smith --- hw/npu-hw-procedures.c | 9 +++++---- hw/npu.c | 29 ++++++++++++++++++++++++++++- include/npu.h | 3 --- 3 files changed, 33 insertions(+), 8 deletions(-) diff --git a/hw/npu-hw-procedures.c b/hw/npu-hw-procedures.c index 4dbb4bafeac5..cc3dcadd0382 100644 --- a/hw/npu-hw-procedures.c +++ b/hw/npu-hw-procedures.c @@ -516,7 +516,7 @@ int64_t npu_dev_procedure_read(struct npu_dev_trap *trap, if (size != 4) { /* Short config reads are not supported */ - NPUDEVERR(dev, "Short read of procedure register\n"); + prlog(PR_ERR, "NPU%d: Short read of procedure register\n", dev->npu->phb.opal_id); return OPAL_PARAMETER; } @@ -538,8 +538,8 @@ int64_t npu_dev_procedure_read(struct npu_dev_trap *trap, break; default: - NPUDEVERR(dev, "Invalid vendor specific offset 0x%08x\n", - offset); + prlog(PR_ERR, "NPU%d: Invalid vendor specific offset 0x%08x\n", + dev->npu->phb.opal_id, offset); rc = OPAL_PARAMETER; } @@ -557,7 +557,8 @@ int64_t npu_dev_procedure_write(struct npu_dev_trap *trap, if (size != 4) { /* Short config writes are not supported */ - NPUDEVERR(dev, "Short read of procedure register\n"); + prlog(PR_ERR, "NPU%d: Short read of procedure register\n", + dev->npu->phb.opal_id); return OPAL_PARAMETER; } diff --git a/hw/npu.c b/hw/npu.c index e444b96a9f09..d54e4bc9f091 100644 --- a/hw/npu.c +++ b/hw/npu.c @@ -552,6 +552,11 @@ static void npu_dev_bind_pci_dev(struct npu_dev *dev) } } + /** + * @fwts-label NPUNotBound + * @fwts-advice Start debugging why we didn't find the right device. + * End result is that NVLink will not function properly + */ prlog(PR_ERR, "%s: NPU device %04x:00:%02x.0 not binding to PCI device\n", __func__, dev->npu->phb.opal_id, dev->index); } @@ -683,7 +688,12 @@ static int npu_isn_valid(struct npu *p, uint32_t isn) if (p->chip_id != p8_irq_to_chip(isn) || p->index != 0 || NPU_IRQ_NUM(isn) < NPU_LSI_IRQ_MIN || NPU_IRQ_NUM(isn) > NPU_LSI_IRQ_MAX) { - NPUERR(p, "isn 0x%x not valid for this NPU\n", isn); + /** + * @fwts-label NPUisnInvalid + * @fwts-advice NVLink not functional + */ + prlog(PR_ERR, "NPU%d: isn 0x%x not valid for this NPU\n", + p->phb.opal_id, isn); return false; } @@ -1276,6 +1286,10 @@ static void npu_probe_phb(struct dt_node *dn) xscom_read(gcid, npu_link_scom_base(dn, xscom, 1) + NX_MMIO_BAR_1, &val); if (!(val & NX_MMIO_BAR_ENABLE)) { + /** + * @fwts-label NPUATBARDisabled + * @fwts-advice NVLink not functional + */ prlog(PR_ERR, " AT BAR disabled!\n"); return; } @@ -1288,6 +1302,12 @@ static void npu_probe_phb(struct dt_node *dn) /* Create PCI root device node */ np = dt_new_addr(dt_root, "pciex", at_bar[0]); if (!np) { + /** + * @fwts-label NPUPHBDeviceNodeFailure + * @fwts-advice Error adding the PHB device node. The + * only real reason for this is that firmware may have + * run out of memory. + */ prlog(PR_ERR, "%s: Cannot create PHB device node\n", __func__); return; @@ -1818,7 +1838,14 @@ static void npu_create_phb(struct dt_node *dn) /* Create PHB slot */ slot = npu_slot_create(&p->phb); if (!slot) + { + /** + * @fwts-label NPUCannotCreatePHBSlot + * @fwts-advice Firmware probably ran out of memory creating + * NPU slot. NVLink functionality could be broken. + */ prlog(PR_ERR, "NPU: Cannot create PHB slot\n"); + } /* Register PHB */ pci_register_phb(&p->phb, OPAL_DYNAMIC_PHB_ID); diff --git a/include/npu.h b/include/npu.h index ff6201efb475..7258e6962ed1 100644 --- a/include/npu.h +++ b/include/npu.h @@ -205,11 +205,8 @@ int64_t npu_dev_procedure_write(struct npu_dev_trap *trap, (p)->phb.opal_id, ##a) #define NPUINF(p, fmt, a...) prlog(PR_INFO, "NPU%d: " fmt, \ (p)->phb.opal_id, ##a) -#define NPUERR(p, fmt, a...) prlog(PR_ERR, "NPU%d: " fmt, \ - (p)->phb.opal_id, ##a) #define NPUDEVDBG(p, fmt, a...) NPUDBG((p)->npu, fmt, ##a) #define NPUDEVINF(p, fmt, a...) NPUINF((p)->npu, fmt, ##a) -#define NPUDEVERR(p, fmt, a...) NPUERR((p)->npu, fmt, ##a) #endif /* __NPU_H */