From patchwork Mon May 23 04:43:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell Currey X-Patchwork-Id: 625040 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rCmCG1nVBz9sds for ; Mon, 23 May 2016 14:43:54 +1000 (AEST) Received: from ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3rCmCG18glzDqGM for ; Mon, 23 May 2016 14:43:54 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from russell.cc (russell.cc [IPv6:2404:9400:2:0:216:3eff:fee0:3370]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3rCmC92MkMzDqCj for ; Mon, 23 May 2016 14:43:49 +1000 (AEST) Received: from snap.ozlabs.ibm.com (static-82-10.transact.net.au [122.99.82.10]) by russell.cc (OpenSMTPD) with ESMTPSA id d58255e7 TLS version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=NO; Mon, 23 May 2016 04:43:46 +0000 (UTC) From: Russell Currey To: skiboot@lists.ozlabs.org Date: Mon, 23 May 2016 14:43:24 +1000 Message-Id: <1463978605-30091-1-git-send-email-ruscur@russell.cc> X-Mailer: git-send-email 2.8.2 Subject: [Skiboot] [PATCH 1/2] nvlink: Set slot information in npu_dev X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair@popple.id.au MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Now that slot information is available for NPUs, it is set on the PCI device of a NPU link, but not on the link (npu_dev) itself. The npu_dev doesn't store a reference to its PCI device, only to the device of the physical GPU after association. To make slot information available on a npu_dev, set it to use the slot information of its PCI device, which is set by generic PCI code. Signed-off-by: Russell Currey --- hw/npu.c | 3 +++ include/npu.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/hw/npu.c b/hw/npu.c index 79b232a..476a1d2 100644 --- a/hw/npu.c +++ b/hw/npu.c @@ -598,6 +598,9 @@ static int npu_dn_fixup(struct phb *phb, if (dev->phb || dev->pd) return 0; + /* Generic PCI code assigns slot info to the pd, give it to the NPU */ + dev->slot_info = pd->slot_info; + /* Bind the emulated PCI device with the real one, which can't * be done until the PCI devices are populated. Once the real * PCI device is identified, we also need fix the device-tree diff --git a/include/npu.h b/include/npu.h index ff6201e..ae94bb0 100644 --- a/include/npu.h +++ b/include/npu.h @@ -148,6 +148,8 @@ struct npu_dev { uint32_t procedure_status; uint8_t pe_num; + + struct pci_slot_info *slot_info; }; /* NPU PHB descriptor */