From patchwork Fri May 20 06:32:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 624331 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3r9yqh6jv8z9t3g for ; Fri, 20 May 2016 16:35:44 +1000 (AEST) Received: from ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3r9yqh5q1XzDqXZ for ; Fri, 20 May 2016 16:35:44 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from e23smtp09.au.ibm.com (e23smtp09.au.ibm.com [202.81.31.142]) (using TLSv1.2 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3r9ynb0vq6zDqCF for ; Fri, 20 May 2016 16:33:55 +1000 (AEST) Received: from localhost by e23smtp09.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Fri, 20 May 2016 16:33:52 +1000 X-IBM-Helo: d23dlp02.au.ibm.com X-IBM-MailFrom: gwshan@linux.vnet.ibm.com X-IBM-RcptTo: skiboot@lists.ozlabs.org Received: from d23relay10.au.ibm.com (d23relay10.au.ibm.com [9.190.26.77]) by d23dlp02.au.ibm.com (Postfix) with ESMTP id 50F672BB0057 for ; Fri, 20 May 2016 16:33:51 +1000 (EST) Received: from d23av02.au.ibm.com (d23av02.au.ibm.com [9.190.235.138]) by d23relay10.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u4K6Xh7u8389080 for ; Fri, 20 May 2016 16:33:51 +1000 Received: from d23av02.au.ibm.com (localhost [127.0.0.1]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id u4K6XILV015205 for ; Fri, 20 May 2016 16:33:19 +1000 Received: from ozlabs.au.ibm.com (ozlabs.au.ibm.com [9.192.253.14]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id u4K6XIVo014543; Fri, 20 May 2016 16:33:18 +1000 Received: from bran.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) by ozlabs.au.ibm.com (Postfix) with ESMTP id E289EA03B1; Fri, 20 May 2016 16:32:31 +1000 (AEST) Received: from gwshan (shangw.ozlabs.ibm.com [10.61.2.199]) by bran.ozlabs.ibm.com (Postfix) with ESMTP id E9E31E3A8D; Fri, 20 May 2016 16:32:31 +1000 (AEST) Received: by gwshan (Postfix, from userid 1000) id C3C53942543; Fri, 20 May 2016 16:32:31 +1000 (AEST) From: Gavin Shan To: skiboot@lists.ozlabs.org Date: Fri, 20 May 2016 16:32:12 +1000 Message-Id: <1463725945-12916-11-git-send-email-gwshan@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1463725945-12916-1-git-send-email-gwshan@linux.vnet.ibm.com> References: <1463725945-12916-1-git-send-email-gwshan@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16052006-0033-0000-0000-000006036C0E X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused Subject: [Skiboot] [PATCH v11 10/23] core/pci: Extend pci_walk_dev() for PCI slot X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair@popple.id.au MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Currently, pci_walk_dev() iterates all PCI devices behind the specified PHB. This extends the function to allow iteration on PCI devices behind the specified PCI slot so that it can be used by PCI hotplug logic in the subsequent patches. Signed-off-by: Gavin Shan Reviewed-by: Russell Currey --- core/pci.c | 12 ++++++++---- hw/npu.c | 4 ++-- include/pci.h | 1 + 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/core/pci.c b/core/pci.c index 5178fd1..f248322 100644 --- a/core/pci.c +++ b/core/pci.c @@ -797,9 +797,9 @@ static void pci_scan_phb(void *data) pci_scan(phb, 0, 0xff, &phb->devices, NULL, has_link); /* Configure MPS (Max Payload Size) for PCIe domain */ - pci_walk_dev(phb, pci_get_mps, &mps); + pci_walk_dev(phb, NULL, pci_get_mps, &mps); phb->mps = mps; - pci_walk_dev(phb, pci_configure_mps, NULL); + pci_walk_dev(phb, NULL, pci_configure_mps, NULL); } int64_t pci_register_phb(struct phb *phb, int opal_id) @@ -1581,11 +1581,15 @@ static struct pci_device *__pci_walk_dev(struct phb *phb, } struct pci_device *pci_walk_dev(struct phb *phb, + struct pci_device *pd, int (*cb)(struct phb *, struct pci_device *, void *), void *userdata) { + if (pd) + return __pci_walk_dev(phb, &pd->children, cb, userdata); + return __pci_walk_dev(phb, &phb->devices, cb, userdata); } @@ -1605,7 +1609,7 @@ static int __pci_find_dev(struct phb *phb, struct pci_device *pci_find_dev(struct phb *phb, uint16_t bdfn) { - return pci_walk_dev(phb, __pci_find_dev, &bdfn); + return pci_walk_dev(phb, NULL, __pci_find_dev, &bdfn); } static int __pci_restore_bridge_buses(struct phb *phb, @@ -1626,7 +1630,7 @@ static int __pci_restore_bridge_buses(struct phb *phb, void pci_restore_bridge_buses(struct phb *phb) { - pci_walk_dev(phb, __pci_restore_bridge_buses, NULL); + pci_walk_dev(phb, NULL, __pci_restore_bridge_buses, NULL); } struct pci_cfg_reg_filter *pci_find_cfg_reg_filter(struct pci_device *pd, diff --git a/hw/npu.c b/hw/npu.c index 1732eae..52ac4ab 100644 --- a/hw/npu.c +++ b/hw/npu.c @@ -541,7 +541,7 @@ static void npu_dev_bind_pci_dev(struct npu_dev *dev) if (!phb) continue; - dev->pd = pci_walk_dev(phb, __npu_dev_bind_pci_dev, dev); + dev->pd = pci_walk_dev(phb, NULL, __npu_dev_bind_pci_dev, dev); if (dev->pd) { dev->phb = phb; /* Found the device, set the bit in config space */ @@ -618,7 +618,7 @@ static int npu_dn_fixup(struct phb *phb, static void npu_phb_final_fixup(struct phb *phb) { - pci_walk_dev(phb, npu_dn_fixup, NULL); + pci_walk_dev(phb, NULL, npu_dn_fixup, NULL); } static void npu_ioda_init(struct npu *p) diff --git a/include/pci.h b/include/pci.h index 9e85518..23006e2 100644 --- a/include/pci.h +++ b/include/pci.h @@ -530,6 +530,7 @@ extern int64_t pci_find_ecap(struct phb *phb, uint16_t bdfn, uint16_t cap, uint8_t *version); extern void pci_device_init(struct phb *phb, struct pci_device *pd); extern struct pci_device *pci_walk_dev(struct phb *phb, + struct pci_device *pd, int (*cb)(struct phb *, struct pci_device *, void *),