From patchwork Mon Mar 21 01:00:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell Currey X-Patchwork-Id: 599922 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3qSyNG70cqz9s5w for ; Mon, 21 Mar 2016 12:07:10 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3qSyNG6FTwzDqFX for ; Mon, 21 Mar 2016 12:07:10 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from russell.cc (russell.cc [IPv6:2404:9400:2:0:216:3eff:fee0:3370]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3qSyN53szmzDq7K for ; Mon, 21 Mar 2016 12:07:01 +1100 (AEDT) Received: from snap.ozlabs.ibm.com (static-82-10.transact.net.au [122.99.82.10]) by russell.cc (OpenSMTPD) with ESMTPSA id 31d33ff1 TLS version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES128-SHA256 bits=128 verify=NO; Mon, 21 Mar 2016 01:00:26 +0000 (UTC) From: Russell Currey To: skiboot@lists.ozlabs.org Date: Mon, 21 Mar 2016 12:00:01 +1100 Message-Id: <1458522006-8846-3-git-send-email-ruscur@russell.cc> X-Mailer: git-send-email 2.7.3 In-Reply-To: <1458522006-8846-1-git-send-email-ruscur@russell.cc> References: <1458522006-8846-1-git-send-email-ruscur@russell.cc> Subject: [Skiboot] [PATCH V2 2/7] pci: Add for_each_phb macro for PHB traversal X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Similar to for_each_cpu, adding a for_each_phb makes PHB traversal easy. Suggested-by: Alistair Popple Signed-off-by: Russell Currey Signed-off-by: Oliver O'Halloran Reviewed-by: Andrew Donnellan --- core/pci.c | 3 +++ include/pci.h | 14 ++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/core/pci.c b/core/pci.c index c51c838..e2fe287 100644 --- a/core/pci.c +++ b/core/pci.c @@ -24,6 +24,7 @@ #define MAX_PHB_ID 256 static struct phb *phbs[MAX_PHB_ID]; +int last_phb_id = 0; #define PCITRACE(_p, _bdfn, fmt, a...) \ prlog(PR_TRACE, "PHB#%04x:%02x:%02x.%x " fmt, \ @@ -818,6 +819,8 @@ int64_t pci_register_phb(struct phb *phb, int opal_id) phbs[opal_id] = phb; phb->opal_id = opal_id; + if (opal_id > last_phb_id) + last_phb_id = opal_id; dt_add_property_cells(phb->dt_node, "ibm,opal-phbid", 0, phb->opal_id); PCIDBG(phb, 0, "PCI: Registered PHB\n"); diff --git a/include/pci.h b/include/pci.h index 4640dda..7b9d088 100644 --- a/include/pci.h +++ b/include/pci.h @@ -228,6 +228,7 @@ struct pci_lsi_state { */ struct phb; +extern int last_phb_id; struct phb_ops { /* @@ -513,6 +514,7 @@ static inline int64_t pci_cfg_write32(struct phb *phb, uint32_t bdfn, } /* Utilities */ + extern int64_t pci_find_cap(struct phb *phb, uint16_t bdfn, uint8_t cap); extern int64_t pci_find_ecap(struct phb *phb, uint16_t bdfn, uint16_t cap, uint8_t *version); @@ -537,6 +539,18 @@ extern int64_t pci_unregister_phb(struct phb *phb); extern struct phb *pci_get_phb(uint64_t phb_id); static inline void pci_put_phb(struct phb *phb __unused) { } +static inline struct phb *__pci_next_phb_idx(uint64_t *phb_id) { + struct phb *phb = NULL; + while (phb == NULL && *phb_id <= last_phb_id) { + phb = pci_get_phb((*phb_id)++); + } + return phb; +} + +#define for_each_phb(phb) \ + for (uint64_t __phb_idx = 0; \ + (phb = __pci_next_phb_idx(&__phb_idx)) ; ) + /* Device tree */ extern void pci_std_swizzle_irq_map(struct dt_node *dt_node, struct pci_device *pd,