| Message ID | 1452137792-24062-3-git-send-email-ruscur@russell.cc |
|---|---|
| State | Superseded |
| Headers | show |
On Thu, 7 Jan 2016 14:36:30 Russell Currey wrote: > As NPUs are emulated PCI devices, they do not get physically fenced as real > PCI devices to. As such, when the device is in a state that it should be PCI devices *do* :) Stewart can probably fix that up when he pulls I guess... > fenced, we need to emulate this behaviour by returning all 1s in config > space reads. > > This will be utilised by error injection in subsequent patches. > > Signed-off-by: Russell Currey <ruscur@russell.cc> > --- > hw/npu.c | 7 +++++++ > include/npu.h | 1 + > 2 files changed, 8 insertions(+) > > diff --git a/hw/npu.c b/hw/npu.c > index 3a06c04..9440f17 100644 > --- a/hw/npu.c > +++ b/hw/npu.c > @@ -390,6 +390,10 @@ static int64_t _npu_dev_cfg_read(struct phb *phb, uint32_t bdfn, > /* Data returned upon errors */ > *data = 0xffffffff; > > + /* If fenced, we want to return all 1s, so we're done. */ > + if (p->fenced) > + return OPAL_SUCCESS; > + > /* Retrieve NPU device */ > dev = npu_dev_cfg_check(p, bdfn, offset, size); > if (!dev) > @@ -1680,6 +1684,9 @@ static void npu_create_phb(struct dt_node *dn) > p->xscom_base = dt_prop_get_u32(dn, "ibm,xscom-base"); > p->total_devices = links; > > + /* XXX: is there any chance we're *already* fenced? */ It's possible the HW is but this patch is purely for the fence emulation/injection. We can fix this up once we've wired up the actual hardware to detect fence conditions. Acked-By: Alistair Popple <alistair@popple.id.au> > + p->fenced = false; > + > /* This is the AT base */ > p->at_xscom = p->xscom_base + NPU_AT_SCOM_OFFSET; > p->at_regs = (void *)dt_get_address(dn, 0, NULL); > diff --git a/include/npu.h b/include/npu.h > index 795b704..5d5135b 100644 > --- a/include/npu.h > +++ b/include/npu.h > @@ -167,6 +167,7 @@ struct npu { > uint64_t tve_cache[NPU_NUM_OF_PES]; > > bool tx_zcal_complete[2]; > + bool fenced; > > struct phb phb; > }; >
diff --git a/hw/npu.c b/hw/npu.c index 3a06c04..9440f17 100644 --- a/hw/npu.c +++ b/hw/npu.c @@ -390,6 +390,10 @@ static int64_t _npu_dev_cfg_read(struct phb *phb, uint32_t bdfn, /* Data returned upon errors */ *data = 0xffffffff; + /* If fenced, we want to return all 1s, so we're done. */ + if (p->fenced) + return OPAL_SUCCESS; + /* Retrieve NPU device */ dev = npu_dev_cfg_check(p, bdfn, offset, size); if (!dev) @@ -1680,6 +1684,9 @@ static void npu_create_phb(struct dt_node *dn) p->xscom_base = dt_prop_get_u32(dn, "ibm,xscom-base"); p->total_devices = links; + /* XXX: is there any chance we're *already* fenced? */ + p->fenced = false; + /* This is the AT base */ p->at_xscom = p->xscom_base + NPU_AT_SCOM_OFFSET; p->at_regs = (void *)dt_get_address(dn, 0, NULL); diff --git a/include/npu.h b/include/npu.h index 795b704..5d5135b 100644 --- a/include/npu.h +++ b/include/npu.h @@ -167,6 +167,7 @@ struct npu { uint64_t tve_cache[NPU_NUM_OF_PES]; bool tx_zcal_complete[2]; + bool fenced; struct phb phb; };
As NPUs are emulated PCI devices, they do not get physically fenced as real PCI devices to. As such, when the device is in a state that it should be fenced, we need to emulate this behaviour by returning all 1s in config space reads. This will be utilised by error injection in subsequent patches. Signed-off-by: Russell Currey <ruscur@russell.cc> --- hw/npu.c | 7 +++++++ include/npu.h | 1 + 2 files changed, 8 insertions(+)